Home > 22nm, 32nm, 45nm, Cadence, chip design, chip designers, EDA, foundries, global semiconductor industry, Indian semiconductor industry, VLSI, VLSI education, VLSI Society of India > Is enough being done for Indian industry-academia collaboration in VLSI education?

Is enough being done for Indian industry-academia collaboration in VLSI education?

November 20, 2010

Do you, as a semiconductor/VLSI/EDA company, run university or educational programs for colleges and institutes? Am sure, you do!

Well, are you providing these various colleges and institutes with the latest tools and EDA software? Perhaps, yes! So, do you regularly check whether your tool is being used properly, or at all? What do you do if the tool remains unopened or unused? Okay, before all of that, are you even guiding the faculty and students to tackle real world problems associated with chip design?

Do the students (and the faculty) know the intricacies of 22nm, 32nm, 45nm, and so on? Are you able to assist students in taping out? Right, is the syllabus taught in all of these colleges good enough to produce the kind of talent and skills that the semiconductor/VLSI industry requires currently, and in the future? Is everything being taught, the latest?

As they say — it takes two to tango… and, it takes two hands to clap! To the Indian academia — how many among you are “really” serious about being trained on a regular basis by the semicon/VLSI/EDA industry? What have you all done about it so far, all of these years? How many colleges and institutes among you (and do you) regularly put up or raise your hand to the industry and say — we lack the knowledge in a particular area and need training – please help us!

The question is: what are you, as a semicon/VLSI/EDA company, doing about training the various faculty and the students in various colleges and institutions across India? Do you have a proper program in place for this activity? Well, is enough being done regarding the industry-academia collaboration in VLSI education in India? What more needs to be done?

Are you, as a college or institute teaching VLSI, happy with the quality of talent coming out? Are you really satisfied with the quality of B.Tech/M.Tech projects? Do you seek industry’s help regarding training on a regular basis? What steps do you take to reach out to them? And, what are you doing about it all? Do you take that initiative seriously?

For that matter, are there easy-to-use systems that enable effective and industry-relevant education? Are those being made use of properly? Can entry barriers be lowered for students and faculty so they can explore an IP idea that has business potential? How many of the colleges have done this? I know of some folks trying to develop such solutions, but that’s a separate story for another day!

Coming back on track, apparently, some semicon companies and few well known Indian institutes are really exceeding themselves, but the same story does not hold true everywhere. Why is it so?

There could be a variety of reasons, and not all are listed here. Is it a lack of initiative on part of the industry and the institutes? Don’t they even talk to each other? Are institutes not able to approach semicon companies and vice versa? Or, is it the locations of the institutes themselves? Is it that not all institutes are concerned about teaching their students how to solve real world chip design problems?

An industry friend had once remarked: As of the last three-four years, students from the Eastern part of India have no clear pathway that they can pursue to get into VLSI design. The reasons are — there are no training institutes in the East, which can teach Synopsys or Cadence tools or even the basics of Xilinx FPGA design.

A very interesting panel discussion titled Forging win-win industry-academia collaboration in VLSI education was held during the Cadence CDNLive India University conference.

Moderated by Dr. C.P. Ravikumar, technical director, University Relations, TI India, the panelists were Dr Ajit Kumar Panda from NIST Behrampur, K Krishna Moorthy, MD, National Semiconductor India, Dr K. Radhakrishna Rao, head, analog training, TI. India and R. Parthasarathy, MD, CADD Centre.

I have already covered Dr. Ravikumar’s remarks separately.

Let’s see what the other panelists have to say about all of this, and whether they have answers to all of the questions or problems. Well, this is another long post, so please bear with me! ;)

Need for university programs to reach various colleges

Dr. A.K. Panda, NIST.

Dr. A.K. Panda, NIST.

In his opening remarks, Dr. Ajit Kumar Panda, from NIST Behrampur, Orissa, said there is a lack of information about the semiconductor industry, adding that it was the collective responsibility of the academia, industry and government to provide the same.

Likewise, there is lack of information about career growth in the semicon industry. Not all of the university programs of the various semicon companies had managed to reach the various colleges in India as well!

Dr. Panda added that the cost of VLSI tools and their renewal each year sometimes acted as a hindrance. There should be VLSI ‘Train the Trainer’ programs in different regions. He also highlighted the significance of having uniformity in B. Tech/M. Tech syllabus in institutes.

He added: “IT companies realized that there is a gap. They first discussed this issue with the institutes, but that did not help. Next, they entered the institutes themselves.”

He cited examples of Wipro Mission 10X — Wipro will train 10,000 faculty members. It is providing training on IT. Microsoft started the .NET programs. IBM’s Center of Excellence has been all over India. Infosys’ Campus Connect program has reached colleges — over 10,000 faculty members have been trained in specific areas.

“If the faculty gets trained, students will also get trained. The Indian semiconductor industry should do the same, etiher through the VLSI Society of India, or the India Semiconductor Association (ISA). There is a need for the industry to move forward in this area,” he added. Prof. Panda also raised the issue of how to make use of open source tools.

“VLSI tools are costly. Can we be able to conduct train the trainer programs?” Since 300 colleges are already using Cadence’s tools, he suggested that Cadence should ensure at least one faculty member from each such college gets trained properly in that particular tool. It will lead to having well over 300 trained teachers.

Call for uniform B.Tech/M.Tech syllabus
He added: “There is no uniformity in B.Tech/M.Tech syllabus. People do not even know the difference between VLSI and embedded.” There is also a problem of attitude and aptitude among students– which is being tackled by the industry and the academia.

Dr. Panda remarked on the attitude of semicon tool vendors toward universities. Apparently, when these vendors start talking with institutes, they invariably say at first — 99.9 percent discount is being given. That itself is very demoralizing!  Also, companies need to send people to the institutes who are industry trained — to teach. Then, the institutes will learn better.

He added that VLSI certification courses may help the industry to choose the best students. He suggested the semicon industry to recruit students who would otherwise join the IT industry.

Dr. Panda added: “The industry cannot sit in Karnataka alone. You have to spread all of this all across India. There should be some specific methods that the semicon industry should undertake to recruit students.”

He requested the VLSI Society of India to start a VLSI certification program. Perhaps, ISA should also conduct a VLSI certification program.

Bridging expectation-knowledge gap

K. Krsihna Moorthy, MD, National Semiconductor India.

K. Krsihna Moorthy, MD, National Semiconductor India.

Presenting an industry perspective, K. Krsihna Moorthy, MD, National Semiconductor India design center, gave the example of learing classical music with chip design — both takes years of solid practise to master! He said: “VLSI is not something you can learn and practise like .NET. It takes a very long time to learn and practise.”

There are industry expectations in digital design, IP, CAD, CAD services, etc. Moorthy raised several key questiions such as: are universities aware of the problems in these areas? How close is their curriculum to the industry’s real needs? But first, has the industry itself educated universities about what its needs are? What has the industry done to bridge the expectation-knowledge gap?

He provided National Semiconductor’s example. In 2001, the company set up an advanced VLSI Lab at IIT Kharagpur. This brought together three key players — Sun, Cadence and National Semiconductor.

Moorthy said: “We created a dedicated National Semicoductor chip design lab. We also supported with the libraries, flows and fab access to the faculty and students.

“We created a process to make chip design happen in the university. We set realistic goals in 2001. We set up a continuous faculty expertise vs. industry needs matching process. We supported sabbatical for faculty to work on real world problems. They visited our corporate labs to discuss with domain experts. We also incubated ideas and sponsored projects.”

AVLSI Consortium
Later, IIT-Kharagpur went on to create the AVLSI Consortium — possibly, the largest academic consortium on VLSI co-ordinated by a single institute.

The model is an angel fund for creating a critical mass of VLSI research students and faculty at IIT Kharagpur. It brings the Consortium together, twice a year, for cross pollination of ideas.

Besides Sun and National Semiconductor, members include Cadence, Mentor Graphics, Synopsys, as well as Analog Devices, Freescale, Infineon, Intel, TI, etc.

According to Moorthy, the Consortium led to — 106 (end of last month) student chips designs fabricated and tested in 10 years; eight US patents, and 35 international publications. It has also become a defacto pre-requisite for M. Tech degree award at IIT Kharagpur. “We have created a consortium (ecosystem) amongst other peer industries,” he added.

So, what should or can be done more, hereafter. Moorthy said: “A working model exists. It can be replicated at the next level — such as BIT/NITs/new IITs, top engg colleges with interested faculties, etc. There is also a need to expand to adjacent domains — biomedical/materials, etc. A genuine pull has to come from the institutes.” As for a uniform syllabus, this aspect is being currently looked into and being addressed under the ISA’s umbrella.

Industry specific needs
Touching upon industry’s specific needs, Moorthy advised that these include digital designs, IP, CAD, CAD services, etc., with skills to architect solutions.and how systems are defined from problems? He suggested that students should now start thinking as to how do they solve real problems?

There is also a need for abstraction management in design/verification, etc. EDA/CAD always catches up. Can the next generation  be made to think ahead? Can practising engineers go back to universities for two to three years — and do  research on newer algorithms? A formal process would be required to do so.

Finally, there is a need to have good grasp of the IP regime at the MS level. Maybe, it can be part of the management course. Similarly, universities should also have a good grasp of the IP regime. Can universities and their faculties take out some time to know what it really takes to build and manage IP, and also learn to protect it?

Analog will never vanish!

!Dr. K. Radhakrishna Rao, head, analog training, TI.

!Dr. K. Radhakrishna Rao, head, analog training, TI.

Dr. K. Radhakrishna Rao, head, analog training, TI, has over 40 years of analog research and training.

He provided a detailed overview of how digital design had moved ahead over the years, while analog continued to plod along the same lines as before. Interestingly, as a student, he apparently had no teacher in digital!

He said: “Analog design lagged behind consistently. We even used to ask students to concentrate on DSPs, if they wanted a better job. So, analog talent seemed to disappear from the country.” However, in the 1990s, when SoCs happened, analog came back into fashion, if you had to be cost effective.

Dr. Rao added: “We could have concentrated on RF. The frontend is also relevant. However, analog will never vanish. It plays a major part in cost reduction. The entire cost of the chip lies in testing and analog.”

He agreed that the current curriculum requires a major revision. “Even if that does not happen, the teacher always has the liberty to teach in the institutes. In the universities, the teachers have to stick to curriculum. That needs to change.”

Students need to be industry ready!

R Parthasarathy, CMD, CADD Centre.

R Parthasarathy, CMD, CADD Centre India.

R Parthasarathy, chairman and managing director, CADD Centre India Pvt Ltd, attributed piracy as the single largest reason behind the success of CAD software. “A software is only as good as the person using it,” he added.

Commenting on the talent crunch, he said that there is a lack of manpower. CADD Center is also training people, and hence, can see the problems from both sides — industry and academia.

The industry needs students with knowledge and skills. Also, training centers are focused on providing these skills. Currently, the skills are more oriented toward the use of technologies. However, the industry requires skills that are more oriented toward getting results.

On the curriculum,  while technologies get updated every 12-18 months, the curruciulum is only updated once in every five years! This has to change. The knowing-doing gap needs to be reduced as well.

He suggested that there is a need for more industry activity with the universities and training centers for basic research and projects. Next, VLSI and semicon companies should try and share projects that are not confidential in nature for the benefit of the academia and students.

He advised students to be mindful that the industry demands that the students themselves be industry ready from day 1.

Try to develop yourselves, keep up with industry!
The panelists made several observations post the presentations. The advise given largely hinted that besides the curriculum, students, as well as the faculties, should try to develop themselves and also keep up with the industry.

Dr. Rao pointed out that while doing product designs, students should know what are the blocks and their characteristics, especially in mixed signal designs.

On a query regarding process nodes, K. Krishna Moorthy said that the gap today is huge, what with 180nm beng taught, and 22nm being current in the industry. As the students are taught, they should be aware of the process nodes change — that would surely help the industry.

On another query regarding chip design experience, he questioned whether we are able to put students through the grind of designing and fabricating a chip. “The industry, via the ISA, is trying to see whether the erstwhile SCL fab can be opened up for universities. It is even more important for students to understand the tricks that they need to know as process nodes change.”

R. Parthasarathy noted that the CADD Centre’s requirements are driven by market changes. He advised students that: “Any curriculum cannot keep pace with that. Any training center will have some industry association. This gap will continue. You should not depend only on what the universities provide to increase your chances of employability. Once, you can differentiate yourself, the companies will grab you.”

Dr. A.K. Panda suggested whether it can be arranged for 50 faculty to sit for 8 hours daily in training? “We, the faculty need to take the drive here.” He added that sometimes, old students do return and try to teach what they know, which helps.

A student from the audience pointed out a critical missing gap — that students were not exposed to the fabricating part. He requested National Semiconductor to help Tamil Nadu — which has over 250 engineering colleges — in the manner they are helping IIT Kharagpur. Another suggested adding Linux in the curriculum, as most tools are based on Open Source, while one other felt that more research should be done out of India.

Concluding the panel discussion, Dr. C.P. Ravikumar remarked that there is a clear difference between IT and semiconductor companies, and their needs. “The industry really looks for skill. You (students) need to take that first step and develop yourselves.”

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  1. Hillol Sarkar
    November 20, 2010 at 9:07 pm

    We are providing tools to all engineering colleges. Our tools can support latest process node. Presentation: bit.ly/ago-product12

    For university request, contact: Manoj Nagesh at manoj.nagesh[at]ago-inc.com

    • November 20, 2010 at 9:20 pm

      Great to hear that, if you are doing so! Now, you know that it is very important to reach out to the VLSI students ;)

      I’d recommend using the social media way… at least, bits of it. And, use your web site in the best manner for marketing.

      Having a detailed university program in place is key!

      By the way, I also have a way (or plan) of joining the several dots together! ;)

    • VLSI
      November 22, 2010 at 7:03 pm

      Mr. Sarkar, nice to know that your tools can be used by the universities. But, we want to emphasize here that Cadence’s tools are with 300 institutes in India, and as per our knowledge, not more then 10 percent are using it effectively.

      Here, a major need is to give the industry standard tools like Cadence’s and train the faculty over it rigorously and continually. so they themselves can teach the students.

      We, at IIVDT are only able to deliver CVCP successfully at NIST as Dr. Panda and his whole staff sits in the class full time, and listen to all lectures, and do all of the labs by themselves. This kind of seriousness from faculty makes students work twice as hard to compete with their professors.

      A complete mindset change in the academia is required to take education a serious business, instead of easy job. We, at IIVDT, have tried to provide comprehensive training to the VTU faculty and invited more than 100 colleges across Karnataka for free for a three-day workshop, but only three colleges turned up! This is the level of the inertia within the education system!!

    • November 22, 2010 at 7:13 pm

      Quite agree that faculty needs to be trained on tools — a point made by Dr Panda as well.

      Am not able to understand why only three colleges turned up for the training facility that was offered — as mentioned by VLSI.

      Perhaps, institutes need to be more aware and mindful of the industry’s needs, and act accordingly. This isn’t such a difficult task, is it? ;) Cheers.

  2. Tim Mazumdar
    November 21, 2010 at 8:50 am

    Comment from LinkedIn:

    Short answer is no! They both run at different wavelengths. More needs to be done to ensure we talk the same wavelength.

    • November 21, 2010 at 8:53 am

      Thanks, Tim sir.. Would love to hear more from you on this subject! Regards.

  3. Manjunatha Hebbar
    November 21, 2010 at 10:23 am

    Industry-ready education in VLSI is still at large. Industry-led interventions do help in bridging this gap. But, the Start-Stop-Start nature of the semiconductor industry puts a lot of stress on such strategic initiatives.

    A good ecosystem built around a long term and full-lifecycle curriculum, followed by a rigorous on-the-job training will help.

    We see good results of such practices in pockets. Opportunity exists to make it big!

  4. Shailendra Mathur
    November 21, 2010 at 2:22 pm

    Comment from LinkedIn:

    I agree with Tim completely. This, I feel can be attributed to a serious lack of vision on part of Indian semi companies even the indian operations of global semicon companies. The Indian community largely is just a coder community. Focussed on the problem of daily food…nothing beyond.

  5. November 21, 2010 at 4:42 pm

    Thanks Manjunath sir and Shailendraji. Would be great if you can share some thoughts on how a plan could be devised for industry-academia collaboration on a national level. We are all aware of the problems. Can we, as an industry, find a good solution that will work for everyone? :) Cheers.

  6. Usha Prasad
    November 21, 2010 at 4:44 pm

    Read your very long article…. :) It is very informative for the industry and the academia, and more so for the students.

  7. Uma Mahesh
    November 22, 2010 at 12:58 pm

    We know among the Americans that the alma mater feeling is SO intense (MOST passionate games are the NCAA!).. We see those college sweatshirts ALL over (not just for the ivy league, but for all)!

    Indians, as a society in general, have no ‘soul mate’ link with what/where we belong…. :)

    It might be our ‘Indian’ attitude of ‘not pushing ourselves, for self betterment, and blame others for our fallcies, failures, and constantly explore innovative excuses!

  8. Priyanka
    February 16, 2012 at 10:48 am

    Hi,

    I am doing the M.Tech in ECE and my thesis work on the Cadence tool. I have a some problem with the Cadence tool to calculating the average power and peak power. Could anyone tell me how can I solve this?

  9. Vamshi
    November 21, 2012 at 1:37 pm

    @priyanka, calculating average power is simple. In your waveform window or ADE window go to Tools > calculator.
    Then select ‘it’ stands for transient current and click the required current node (can be the supply for total power), the red dot in your schematic. Now you should see that node selected in the calculator. Then use ‘average’ from special functions which are usually on the lower bottom of calculator window. get the result and multiplying with supply voltage you have your average power!

  1. November 21, 2010 at 2:11 am
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