Slew of EDA announcements @ DAC 2011


The Design and Automation Conference (DAC) 2011, kicked off today in San Diego, USA, with its usual slew of announcements. Leading the pack were Magma Design Automation and Cadence Design Systems, along with Synopsys, Mentor Graphics, and several others.

Magma Design Automation Inc. announced a partnership with Fraunhofer Institute for Integrated Circuits IIS to develop process-independent Titan FlexCell models of the Institute’s analog intellectual property (IP) cores. It also announced the availability of a netlist-to-GDSII reference flow for GLOBALFOUNDRIES’ 28nm super low-power (SLP) high-k metal-gate (HKMG) technology.

Magma announced the immediate availability of the Titan Analog Design Kit for TSMC 180nm and 65nm processes, that implements Titan’s model-based design methodology with Titan FlexCells, which are modular, process- and specification-independent, reusable analog building blocks.

Magma Design Automation also launched Silicon One, an initiative to bring focus to making silicon profitable for customers by providing differentiated solutions and technologies that address business imperatives facing semiconductor makers today – time to market, product differentiation, cost, power and performance.

Silicon One’s initial focus is on five types of devices that are key to electronic products that are most prevalent today:
* ASIC /ASSP
* Analog/mixed-signal (AMS)
* Memory
*  Processing cores
* SoCs.

Cadence Design Systems Inc. isn’t far behind either!  It announced an array of new technologies incorporated into the new TSMC Reference Flow 12.0 and AMS Reference Flow v2.0 that ensure 28nm production readiness. Cadence also announced a close collaboration with TSMC that will extend its interface IP offering.  With Imec, in Belgium, Cadence announced a new technology that delivers an automated test solution for design teams deploying 3D stacked ICs (3D-ICs).

Cadence also announced the immediate availability of verification IP (VIP) for ARM’s new AMBA 4 Coherency Extensions protocol (ACE), extending its popular VIP catalog and speeding the development of multiprocessor mobile devices. Cadence further outlined the technologies and steps required to move the industry to advanced node design, with a particular focus on 20nm and 28nm design.

Mentor Graphics announced that the Catapult C high-level synthesis tool now supports the synthesis of transaction level models (TLMs). It also announced a unified embedded software debugging platform, from pre-silicon to final product, based on the integration of the Mentor Embedded Sourcery CodeBench embedded software development tools with Mentor’s leading electronic system level (ESL), verification, and hardware emulation products. These include the Mentor Graphics Vista Virtual Prototyping product, Veloce hardware emulator, prototype target boards, and end products or any combination thereof.

Mentor Graphics announced support for 3D-IC in TSMC’s Reference Flow 12.0 (RF12). Solutions for both silicon interposer and through silicon via (TSV) stacked die configurations are now supported by the Calibre physical verification and extraction platform and the Tessent IC test solution.

ARM and Synopsys Inc. have signed an expanded multi-year agreement extending ARM’s access to Synopsys’ innovative EDA technology. ARM will also provide Synopsys with access to the ARM Cortex-A15 processor to maximize performance and energy efficiency of SoCs built by ARM’s Partners using this advanced ARM processor and Synopsys tools.

Some of the other announcements made on the opening day of DAC 2011 included, Atrenta who announced that Fujitsu Kyushu Network Technologies Ltd has adopted its SpyGlass AutoVerify for Advanced Lint analysis to achieve design quality of results (QoR) and design productivity improvements in their ASIC/FPGA flows.

Concept Engineering and Calypto Design Systems renewed an existing OEM agreement, allowing Calypto to integrate and use Concept Engineering’s Nlview automatic schematic generation and viewing software as the visualization engine for the complete PowerPro product family.

Cortus S.A., MagnaChip Semiconductor Corp. and Taegee Co. Ltd have developed an advanced, low power, 32bit microprocessor based ASMCU (Application Specific Microcontroller) and associated IP for use in products such as tablet computers, smart phones, laptops and other widely-used touch screen applications.

Extreme DA and ATopTech Inc. announced an extension to their co-operation for timing sign-off technology. SpringSoft Inc. announced that its Laker Custom Layout Automation System is selected by TSMC for its 28nm AMS Reference Flow 2.0 and Reference Flow 12.0 for digital design.

ARM announced the latest AMBA 4 interface and protocol specification featuring the AMBA 4 AXI Coherency Extensions (ACE). Cache coherency is essential in multicore computing applications to efficiently maintain the consistency of data stored in local caches of a shared resource. It seems that the EDA industry is doing well, for now!

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