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Applications of multilayer chip capacitors

February 12, 2013 2 comments

I had the pleasure of interacting many times with Norman CM Lui, CEO, Skymos back in 2006. Established 1983, Skymos Electronics Ltd is one of the foremost designers and manufacturers of chip components, specializing in multilayer chip inductors, ferrite chip beads, multilayer chip ceramic capacitors, chip resistors and resistor networks. It has been awarded ISO 9001 and 9002 approval.

It was among the few suppliers offering multilayer chip inductors, ferrite chip beads, chip resistors, low-temperature co-fired ceramic capacitors (LTCC), etc.

LTCCBack then, he spoke of the applications of MLCCs that were generally in Bluetooth, GPS, cable TV equipment, satellite, etc. For example, taxis plying with GPS would need high Q (quality) MLCCs. New applications include converged handsets, MP4 players, PS3, digital cameras and video cameras; flat-panel high-definition TVs; dual-core multiprocessors (for motherboards, notebooks, desktop PCs and scanners); and automotive electronics.

Lui said most suppliers were more concerned about the 3H – high capacitance, high voltage and high frequency – for MLCCs, as well as high Q (quality factor). The frequency of MLCCs had become much higher as the termination is done on the top, instead of the sides.

Various types of dielectric were being used for MLCCs – such as the BaTiO3, NP0/C0G, XSR/X7R and Y5V/Z5U, respectively. The X5R allowed more capacitance for MLCCs and dielectric constant (K) was higher. The NP0/C0G group supported capacitance ranging from 1pF to 1µF and up to 10nF.

As for the electrodes, Pd/Ag was being used and Ni was also being used currently. For Pd/Ag electrode, the termination was in Ag/Ni/Sn. For Ni electrode, termination was mainly in Cu/Ni/Sn. Skymos is currently focusing on the Pd/Ag electrodes for MLCCs.

One major development was the use of BME (base metal electrode). Lui said that moving from the current electrode to BME would require lot of investment of about $50 million. For using BME, suppliers would need to install all new equipment, especially for the furnace, which would be used to oxidize the Ni element.

Another development has been the improvement in capacitance. Using BME for 0402, suppliers can produce MLCCs with high capacitance, such as 2.2µF, 3.3µF/6.3V, etc. Earlier, capacitance was 0.47µF using Pd/Ag electrode. The BME could enable higher capacitance due to an increase in the number of active layers.

For instance, the dielectric was 8-10 microns when using Pd/Ag electrodes. Using BME, the dielectric became 2-3 microns. The corresponding values for 0603 type is 10µF/6.3V using BME, 47µF for 0805, and 220µF for 1206. MLCCs have replaced those applications that previously required tantalum capacitors.

Another development has been the advent of the MLCC array, which has more applications in the PC industry. This array can reduce the EMI. Skymos is offering this MLCC array. It also improves the high Q, voltage and capacitance.

On the issue of MLCCs vs. ultracapacitors, Lui said, suppliers could already reach up to 220µF capacitance via MLCC, which were replacing tantalum capacitors. The tantalum capacitors were now being used for applications requiring 220µF-330µF capacitance. As a result, all other types of capacitors were dropping in demand, as compared to MLCCs. Ultracapacitors were intended to replace the Ni battery. However, there has also been a shift to oxide batteries.

The supplier’s R&D strategy includes focusing on 3H and possibly, BME. It also reduced the insulation loss and noise by grounding. The MLCC combined a capacitor and a filter. I hope Skymos has produced 20KV MLCCs. It was already offering 10KV MLCCs.

Most of this data actually appeared in Global Sources Electronics Components magazine in 2006!

ST/Freescale intro 32-bit MCUs for safety critical applications


Early this month, STMicroelectronics and Freescale Semiconductor introduced a new dual-core microcontroller (MCU) family aimed at functional safety applications for car electronics.

These 32-bit devices help engineers address the challenge of applying sophisticated safety concepts to comply with current and future safety standards. The dual-core MCU family also includes features that help engineers focus on application design and simplify the challenges of safety concept development and certification.

Based on the industry-leading 32-bit Power Architecture technology, the dual-core MCU family, part-numbered SPC56EL at ST and MPC564xL at Freescale, is ideal for a wide range of automotive safety applications including electric power steering for improved vehicle efficiency, active suspension for improved dynamics and ride performance, anti-lock braking systems and radar for adaptive cruise control.

Freescale/STMicroelectronics JDP
The Freescale/STMicroelectronics joint development program (JDP) is headquartered in Munich, Germany, and jointly managed by ST and Freescale.

The JDP is accelerating innovation and development of products for the automotive market. The JDP is developing 32-bit Power Architecture MCUs manufactured on 90nm technology for an array of automotive applications: a) powertrain, b) body, c) chassis and safety, and d) instrument cluster.

STMicroelectronics’ SK Yue, said: “We are developing 32-bit MCUs based on 90nm Power Architecture technology. One unique feature — it allows customer to use dual core or single core operation. The objective of this MCU is to help customers simplify design and to also reduce the overall system cost.

On the JDP, he added: “We will have more products coming out over a period of time. This JDP is targeted toward automotive products.”

Commenting on the automotive market today, he said that from June onward, the industry has been witnessing a gradual sign of recovery coming in the automotive market.

1 MB safety and chassis controller -- 32-bit MCU courtesy Freescale/STMicroelectronics joint development program (JDP)

1 MB safety and chassis controller -- 32-bit MCU courtesy Freescale/STMicroelectronics joint development program (JDP)

Automotive market challenges

There has been an increasing integration and system complexity. These include:

* Increasing electrification of the vehicle (replacing traditional mechanical systems).

* Mounting costs pressure leading to integration of more functionality in a single ECU.

* Subsequent increase in use of high-performance sensor systems has driven increased MCU performance needs.

There are also increasing safety expectations. Automotive system manufacturers need to guarantee the IEC61508 (SIL3) and ISO26262 (ASILD) system-safety capability. Also, a move from passive to active safety is increasing the number of safety functions distributed in many ECUs.

Finally, there is a continued demand for quality — in form of zero defects, by which, a 10x quality improvement is expected.

MCU family addresses market challenges

The MCU family offers exceptional integration and performance. These include: high-end 32-bit dual-issue Power Architecture cores, combined with comprehensive peripheral set in 90nm non-volatile-memory technology. It also provides a cost effective solution by reducing board size, chip count and logistics/support costs.

It also solves functional safety. The Functional Safety architecture has been specifically designed to support IEC61508 (SIL3) and ISO26262 (ASILD) safety standards. The architecture provides redundancy checking of all computational elements to help endure the operation of safety related tasks. The unique, dual mode of operation allows customers to choose how best to address their safety requirements without compromising on performance.

The MCU also offers best-in-class quality. It is design for quality, aiming for zero defects. The test and manufacture have been aligned to lifetime warranty needs.

The MCU family addresses the challenges of applying sophisticated safety concepts to meet future safety standards. Yue added, “There are two safety standards — we are following those guidelines.” These are the IEC61508 (SIL3) and ISO26262 (ASILD) system-safety capabilities.

The automotive industry is also targeting for zero defects. “Therefore, all suppliers in tier 1 and 2 need to come up with stringent manuyfaturing and testing process that ensures zero defects,” he said.

32-bit dual-issue, dual-core MCU family

Finally, why dual core? Yue said that the MCU helps customers to achieve to achieve safety and motor control. Hence, dual core will definitely help deliver results.

“In many automotive applications, especially in safety-related applications, we want to have redundancy for safety. In the lock-step mode, two cores run the same task simultaneously, and results are then compared to each other in every computation. If the results are not matched, it indicates that there are some problems.”

This MCU family definitely simplifies design. It uses a flexible, configurable architecture that addresses both lock-step and dual parallel operation modes on a single dual-core chip. Next, it complies with safety standards.

A redundant architecture provides a compelling solution for real-time applications that require compliance with the IEC61508 SIL3 and ISO26262 ASIL-D safety standards. It also lowers the systems cost.

Dual-core architecture reduces the need for component duplication at the system level, and lowers overall system costs.

Are we at an inflection point in verification?


synopsysAre we at an inflection point in verification today? Delivering the guest keynote at the UVM 1.2 day, Vikas Gautam, senior director, Verification Group, Synopsys, said that today, mobile and the Internet of Things are driving growth. Naturally, the SoCs are becoming even more complex. It is also opening up new verification challenges, such as power efficiency, more software, and reducing time-to-market. There is a need to shift-left to be able to meet time-to-market goal.

The goal is to complete your verification as early as possible. There have been breakthrough verification innovations. System Verilog brought in a single language. Every 10-15 years, there has been a need to upgrade verification.

Today, many verification technologies are needed. There is a growing demand for smarter verification. There is need for much upfront verification planning. There is an automated setup and re-use with VIP. There is a need to deploy new technologies and different debug environments. The current flows are limitimg smart verification. There are disjointed environments with many tools and vendors.

Synopsys has introduced the Verification Compiler. You get access to each required technology, as well as next-gen technology. These technologies are natively integrated. All of this enables 3X verification productivity.

Regarding next gen static and formal platforms, there will be capacity and performance for SoCs. It should be compatible with implementation products and flows. There is a comprehensive set of applications. The NLP+X-Prop can help find tough wake-up bug at RTL. Simulation is tuned for the VIP. There is a ~50 percent runtime improvement.

System Verilog has brought in many new changes.  Now, we have the Verification Compiler. Verdi is an open platform. It offers VIA – a platform for customizing Verdi. VIA improves the debug efficiency.

Are we about to reach end of Moore’s Law?


Here is the concluding part of my discussion with Sam Fuller, CTO, Analog Devices. We discussed the technology aspects of Moore’s Law and

Sam Fuller

Sam Fuller

‘More than Moore’, among other things.

Are we at the end of Moore’s Law?
First, I asked Fuller that as Gordon Moore suggested – are we about to reach the end of Moore’s Law? What will it mean for personal computing?

Fuller replied: “There is definitely still life left in Moore’s law, but we’re leaving the golden age after the wonderful ride that we have had for the last 40 years. We will continue to make chips denser, but it is becoming difficult to continue to improve the performance as well as lower the power and cost.

“Therefore, as Moore’s law goes forward, more innovation is required with each new generation. As we move from Planer CMOS to FinFET (a new technology for multi-gate architecture of transistors); from silicon to more advanced materials Moore’s law will still have life for the next decade, but we are definitely moving into its final stages.

“For personal computing, there is still a lot of innovation left before we begin to run out of ideas. There will continue to be great advances in smart phones, mobile computing and tablets because software applications are really just beginning to take advantage of the phenomenal power and capacity of today’s semiconductors. The whole concept of ‘Internet of things’ will also throw up plenty of new opportunities.

“As we put more and more sensors in our personal gadgets, in factories, in industries, in infrastructures, in hospitals, and in homes and in vehicles, it will open up a completely new set of applications. The huge amount of data generated out of these sensors and wirelessly connected to the Internet will feed into the big data and analytics. This would create a plethora of application innovations.”

What’s happening in the plane?
The plane opportunity – 90nm – 65nm – 45nm – 22nm – 20nm – 14/18nm – is starting to get difficult and probably won’t work at 12nm, for purely physics reasons. What is Analog Devices’ take on this?

Fuller said: “You are right! We have been going from 45 nm down to lower nodes, it’ll probably go down to 10 nm, but we are beginning to run into some fundamental physics issues here. After all, it’s a relatively finite number of atoms that make up the channels in these transistors. So, you’re going to have to look at innovations beyond simply going down to finer dimensions.

“There are FinFETS and other ways that can help move you into the third dimension. We’re getting to a point where we can put a lot of complexity and a number of functions on a single die. We have moved beyond purely digital design to having more analog and mixed signal components in the same chip. There are also options such as stacked dies and multiple dies.

“Beyond integration on a single chip, Analog Devices leads in advanced packaging technologies for System in a Package (SiP) where sensors, digital and analog/mixed signal components are all in a single package as the individual components would typically use different technology nodes and it might not be practical to do such integration on a single die.

“So, the challenge often gets described as “More than Moore”, which is going beyond Moore’s law, bringing those capabilities to do analog processing as well as digital and then integrating sensors for temperature sensing, pressure sensing, motion sensing and a whole range of sensors integrated for enabling the ‘Internet of Things’.

“At Analog Devices, we have the capability in analog as well as digital, and having worked for over 20 years on MEMS devices, we are particularly well positioned as we get into ‘More than Moore’.”
Read more…

Global semicon industry trends in 2014: Analog Devices


Sam Fuller

Sam Fuller

I recently met Sam Fuller, CTO, Analog Devices, and had an interesting conversation. First, I asked him about the state of the global semicon industry in 2013.

Industry in 2013
He said: “Due to the uncertainties in the global economy in the last couple of years, the state of the global semiconductor industry has been quite modest growth. Because of the modest growth, there has been a buildup in demand. As the global economies begin to be more robust going forward, we expect to see more growth.”

Industry in 2014?
How does Analog Devices see the industry going forward in 2014? What are the five key trends?

He added: “I would talk about the trends more from an eco-system and applications perspective. Increased capability on a single chip: Given all the advances to Moore’s law, the capability of a chip has increased considerably in all dimensions and not just performance, be it the horsepower we see in today’s smartphones or the miniaturization and power consumption of wearable gadgets that were on show this year at CES.

“In Analog Devices’ case, as we are focused on high performance signal processing, we can put more of the entire signal chain on a single die. For our customers, the challenge is to provide their customers a more capable product which means a more complex product, but with a simpler interface.

“A classic example is our AD9361 chip, which is a single chip wideband radio transceiver for Software Defined Radio (SDR). It is a very capable ASSP (Application Specific Standard Products) as well as RF front end with a wide operating frequency of 70 MHz to 6 GHz.

“This chip, coupled with an all-purpose FPGA, can build a very flexible SDR operating across different radio protocols, wide frequency range and bandwidth requirements all controlled via software configuration. It finds a number of applications in wireless communication infrastructure, small cell Base stations as well as a whole range of custom radios in the industrial and aerospace businesses.”

Now, let’s see the trends for 2014!

More collaboration with customers: There is a greater emphasis on understanding customers’ end applications to provide a complete signal chain, all in a System on a Chip (SoC) or a System in a package (SiP). The relationship with our customers is changing as we move more towards ASSPs focused with few lead customers for target markets and target applications. While this has already been ongoing in the consumer industry with PCs and laptops, customers in other vertical markets like healthcare, automotive and industrial are and will collaborate more with semiconductor companies like Analog Devices to innovate at a solutions level.

More complete products: We have evolved from delivering just the silicon at a component level to delivering more complete products with more advanced packaging for various 3D chips or multi-die within a package. Our solutions now have typically much more software that makes it easier to configure or program the chips. It is a solution that is a combination of more advanced silicon, advanced packaging and more appropriate software.

With providing the complete solution, the products are more application specific and hence, the need for more collaboration with customers. For example, there may be one focused on Software Defined Radio, one for motor control, and one for vital signs monitoring for consumer health that we have launched recently.

We need it to be generic enough that multiple customers can use it, but it needs to be as tailored as possible to the customers’ needs for specific market segments. While because of the volume and standardization, availability of complete reference designs in the consumer world has been the norm, other market segments are demanding more complete products not-withstanding the huge variation in protocols and applications.

Truly global industry: The semiconductor and electronics industry has become truly global, so multiple design sites around the globe collaborate to create products. For example for Analog Devices, one of our premier design sites is our Bangalore product design center where we quite literally developed our most complex and capable chips. At the same time our customers are also global.

We see large multinational companies like GE, Honeywell, Cisco, Juniper, ABB, Schneider and many of our top strategic customers globally doing substantial system design work in Bangalore along with a multitude of India design houses. Our fastest growing region is in Asia, but we have substantial engagement with customers in North America and Europe. And our competition is also global, which means that the industry is ever moving faster as the competition is global.

Smarter design tools: The final trend worth talking about is the need for smarter design tools.  As our products and our customers’ products become more complex and capable, there have to be rapidly developing design tools, for us to design them.

This cannot be done by brute force but by designing smarter and better tools. There is a lot of innovation that goes on in developing better tool suites. There is also ever more capable software that caters to a market moving from 100s of transistors to literally billions of transistors for an application.

STMicro intros M24SR dynamic NFC/RFID tag


Amit Sethi

Amit Sethi

STMicroelectronics recently introduced the M24SR dynamic NFC/RFID tag.

Speaking about the USP of the M24SR, Amit Sethi, Product Marketing manager – Memories and RFID, STMicroelectronics India, said: “The unique selling proposition of the M24SR product is its two interfaces, giving users and applications the ability to program or read its memory using either an RF NFC interface or a wired I2C interface, in an affordable and easy-to-use device for a wide range of applications such as consumer/home appliance, OTP card, healthcare/wellness and industrial/smart meter.”

Let us see how the M24SR is beneficial for smartphone or any other audio device.

The M24SR is a dynamic NFC/RFID tag that manages the data exchange between the NFC phone and the microcontroller. The main use cases for data exchange are updating user settings, downloading data logs, and remote programming and servicing. The dynamic tag also enables seamless Bluetooth and Wi-Fi pairing, which is useful in, for example, audio devices.

How is the M24SR different from other products of the same segment?

Sethi said that the key difference is the dual interface: the M24SR memory can be accessed either by a low-power 2C interface or

M24SR

M24SR

by an ISO14443A RF interface operating at 13.56MHz. It also features RF status (MCU wake-up) and RF disable functions to minimize power consumption. In addition, the devices support the NFC data exchange format (NDEF from NFC forum) and 128-bit password protection mechanism.

The M24SR series is available in EEPROM memory densities from 2 Kbit to 64 Kbit and three package types: SO8, TSSOP8, and UFDFPN8.

What are the contributions of M24SR toward the Internet of Things?

Accotding to him, the M24SR dynamic NFC/RFID tag interactive and zero power capability, simplifies complex communications setups and enables data exchange among the home automation, wearable electronics, home appliances, smart meter, wellness, etc.

Especially with the NFC capability, the M24SR is ideal for applications waiting for something, like a ticket or ID to launch an activity.

Relevance for India
Finally, what’s the relevance of the product for the Indian market?

Sethi added: “Mobile and NFC based application are gaining its popularity in India. M24SR is an easy-to-use and an affordable product for the Implementation of NFC-based applications in transportation, entertainment, and lifestyle areas.

As for the go-to-market strategy, the M24SR mass market launch is planned for end of February 2014. Some M24SR samples have been delivered to key customers during Q4 2013 and design/development is ongoing.

3D remains central theme for Applied in 2014!


Om Nalamasu

Om Nalamasu

Following a host of forecasts for 2014, it is now the turn of Applied Materials with its forecast for the year. First, I asked Om Nalamasu, senior VP, CTO, Applied Materials regarding the outlook for the global semicon industry in 2014.

Semicon outlook 2014
He said that Gartner expects the semiconductor industry to grow in mid-single digits to over $330 billion in 2014.

“In our industry – the semiconductor wafer fab equipment sector – we are at the beginning of major technology transitions, driven by FinFET and 3D NAND, and based a wide range of analyst projections, wafer fab equipment investment is expected to be up 10-20 percent in 2014. We expect to see a year-over-year increase in foundry, NAND, and DRAM investment, with logic and other spending flat to down.”

Five trends for 2014
Next, what are the top five trends likely to rule the industry in 2014?

Nalamasu said that the key trends continuing to drive technology in 2014 and beyond include 3D transistors, 3D NAND, and 3D packaging. 3D remains a central theme. In logic, foundries will ramp to 20nm production and begin early transition stages to3D finFET transistors.

With respect to 3D NAND, some products will be commercially available, but most memory manufacturers plan to crossover from planar NAND to vertical NAND starting this year. In wafer level packaging, critical mechanical and electrical characterization work is bringing the manufacturability of 3D-integrated stacked chips closer to reality.

These device architecture inflections require significant advances in precision materials engineering. This spans such critical steps as precision film deposition, precision materials removal, materials modification and interface engineering. Smaller features and atomic-level thin films also make interface engineering and process integration more critical than ever.

Driving technology innovations are mobility applications which need high performance, low power semiconductors. Smartphones, smart watches, tablets and wearable gadgets continue to propel industry growth. Our customers are engaged in a fierce battle for mobility leadership as they race to be the first to market with new products that improve the performance, battery-life, form-factor and user experience of mobile devices.

How is the global semiconductor industry managing the move to the sub 20nm era?

He said that extensive R&D work is underway to move the industry into the sub-20nm realm. For the 1x nodes, more complex architectures and structures as well as new higher performance materials will be required.

Some specific areas where changes and technology innovations are needed include new hard mask and channel materials, selective material deposition and removal, patterning, inspection, and advanced interface engineering. For the memory space, different memory architectures like MRAM are being explored.

FinFETs in 20nm!
By the way, have FinFETs gone to 20nm? Are those looking for power reduction now benefiting?

FinFET transistors are in production in the most advanced 2x designs by a leading IDM, while the foundries are in limited R&D production. In addition to the disruptive 3D architecture, finFET transistors in corporate new materials such as high-k metal gate (HKMG) that help to drastically reduce power leakage.

Based on public statements, HKMG FinFET designs are expected to deliver more than a 20 percent improvement in speed and a 30 percent reduction in power consumption compared to28nm devices. These are significant advantages for mobile applications.

Status of 3D ICs
Finally, what’s the status with 3D ICs? How is Applied helping with true 3D stacking integration?

Nalamasu replied that vertically stacked 3D ICs are expected to enter into production first for niche applications. This is due primarily to the higher cost associated with building 3D wafer-level-packaged (WLP) devices. While such applications are limited today, Applied Materials expects greater utilization and demand to grow in the future.

Applied is an industry leader in WLP, having spear-headed the industry’s development of through silicon via (TSV) technology. Applied offers a suite of systems that enable customers to implement a variety of packaging techniques, from bumping to redistribution layer (RDL) to TSV. Because of work in this area, Applied is strongly positioned to support customers as they begin to adopt this technology.

To manufacture a robust integrated 3D stack, several fundamental innovations are needed. These include improving defect density and developing new materials such as low warpage laminates and less hygroscopic dielectrics.

Another essential requirement is supporting finer copper line/spacing. Important considerations here are maintaining good adhesion while watching out for corrosion. Finally, for creating the necessary smaller vias, the industry needs high quality laser etching to replace mechanical drilling techniques.

FinFETs delivering on promise of power reduction: Synopsys


Here is the concluding part of my conversation with Synopsys’ Rich Goldman on the global semiconductor industry.

Rich Goldman

Rich Goldman

Global semicon in sub 20nm era
How is the global semicon industry performing after entering the sub 20nm era? Rich Goldman, VP, corporate marketing and strategic alliances, Synopsys, said that driving the fastest pace of change in the history of mankind is not for the faint of heart. Keeping up with Moore’s Law has always required significant investment and ingenuity.

“The sub-20nm era brings additional challenges in device structures (namely FinFETs), materials and methodologies. As costs rise, a dwindling number of semiconductor companies can afford to build fabs at the leading edge. Those thriving include foundries, which spread capital expenses over the revenue from many customers, and fabless companies, which leverage foundries’ capital investment rather than risking their own. Thriving, leading-edge IDMs are now the exception.

“Semiconductor companies focused on mobile and the Internet of Things are also thriving as their market quickly expands. Semiconductor companies who dominate their space in such segments as automotive, mil/aero and medical are also doing quite well, while non-leaders find rough waters.”

Performance of FinFETs
Have FinFETs gone to below 20nm? Also, are those looking for power reduction now benefiting?

He added that 20nm was a pivotal point in advanced process development. The 20nm process node’s new set of challenges, including double patterning and very leaky transistors due to short channel effects, negated the benefits of transistor scaling.

To further complicate matters, the migration from 28nm to 20nm lacked the performance and area gains seen with prior generations, making it economically questionable. While planar FET may be nearing the end of its scalable lifespan at 20nm, FinFETs provide a viable alternative for advanced processes at emerging nodes.

The industry’s experience with 20nm paved the way for an easier FinFET transition. FinFET processes are in production today, and many IC design companies are rapidly moving to manufacture their devices on the emerging 16nm and 14nm FinFET-based process geometries due to the compelling power and performance benefits. Numerous test chips have taped out, and results are coming in.

“FinFET is delivering on its promise of power reduction. With 20nm planar FET technologies, leakage current can flow across the channel between the source and the drain, making it very difficult to completely turn the transistor off. FinFETs provide better channel control, allowing very little current to leak when the device is in the “off” state. This enables the use of lower threshold voltages, resulting in better power and performance. FinFET devices also operate at a lower nominal voltage supply, significantly improving dynamic power.”
Read more…

Can 2014 be a major year for global semicon industry?


The year 2014 is expected to be a major year for the global semiconductor industry. The industry will and continue to innovate!

Apparently, there are huge expectations from certain segments such as the so-called Internet of Things (IoT) and wearable electronics. There will likely be focus on the connected car. Executives have been stating there could be third parties writing apps that can help cars. Intel expects that technology will be inspiring optimism for healthcare in future. As per a survey, 57 percent of people believe traditional hospitals will be obsolete in the future.

Some other entries from 2013 include Qualcomm, who introduced the Snapdragon 410 chipset with integrated 4G LTE world mode for high-volume smartphones. STMicroelectronics joined ARM mbed project that will enable developers to create smart products with ARM-based industry-leading STM32 microcontrollers and accelerate the Internet of Things.

A look at the industry itself is interesting! The World Semiconductor Trade Statistics Inc. (WSTS) is forecasting the global semiconductor market to be $304 billion in 2013, up 4.4 percent from 2012. The market is expected to recover throughout 2013, driven mainly by double digit growth of Memory product category. By region, all regions except Japan will grow from 2012. Japan market is forecasted to decline from 2012 in US dollar basis due to steep Japanese Yen depreciation compared to 2012.

WSTS estimates that the worldwide semiconductor market is predicted to grow further in 2014 and 2015. According to WSTS, the global semiconductor market is forecasted to be up 4.1 percent to $317 billion in 2014, surpassing historical high of $300 billion registered in 2011. For 2015, it is forecasted to be $328 billion, up 3.4 percent.

All product categories and regions are forecasted to grow positively in each year, with the assumption of macro economy recovery throughout the forecast period. By end market, wireless and automotive are expected to grow faster than total market, while consumer and computer are assumed to remain stagnant.

Now, all of this remains to be seen!

Earlier, while speaking with Dr. Wally Rhines of Mentor, and Jaswinder Ahuja of Cadence, both emphasized the industry’s move to 14/16nm. Xilinx estimates that 28nm will have a very long life. It also shipped the 20nm device in early Nov. 2013.

In a 2013 survey, carried out by KPMG, applications markets identified as most important by at least 55 percent of the respondents were: Mobile technology – 69 percent; Consumer – 66 percent; Computing – 63 percent; Alternative/Renewal Energy – 63 percent; Industrial – 62 percent; Automotive – 60 percent; Medical – 55 percent; Wireline Communications – 55 percent.

Do understand that there is always a line between hope and forecasts, and what the end result actually turns out to be! In the meantime, all of us continue to live with the hope that the global semiconductor will carry on flourishing in the years to come. As Brian Fuller, Cadence, says, ‘the future’s in our hands; let’s not blow it!’

Round-up 2013: Best of semiconductors, electronics and solar


Virtex UltraScale device.

Virtex UltraScale device.

Friends, here’s a review of 2013! There have been the usual hits and misses, globally, while in India, the electronics and semiconductor industries really need to do a lot more! Enjoy, and here’s wishing everyone a Very Happy and Prosperous 2014! Be safe and stay safe!!

DEC. 2013
What does it take to create Silicon Valley!

How’s global semicon industry performing in sub-20nm era?

Xilinx announces 20nm All Programmable UltraSCALE portfolio

Dr. Wally Rhines: Watch out for 14/16nm technologies in 2014!

Outlook 2014: Xilinx bets big on 28nm

NOV. 2013
Indian electronics scenario still dull: Leaptech

Connecting intelligence today for connected world: ARM

India poses huge opportunity for DLP: TI

SEMICON Europa 2013: Where does Europe stand in 450mm path?

OCT. 2013
Apple’s done it again, wth iPad Air!

IEF 2013: New markets and opportunities in sub-20nm era!

SEPT. 2013
ST intros STM32F4 series high-performance Cortex-M4 MCUs

Great, India’s having fabs! But, is the tech choice right?

G450C

G450C

Now, India to have two semicon fabs!

Higher levels of abstraction growth area for EDA

AUG. 2013
Moore’s Law could come to an end within next decade: POET

What’s happening with 450mm: G450C update and status

300mm is the new 200mm!

JULY 2013
Xilinx tapes-out first UltraScale ASIC-class programmable architecture

JUNE 2013
EC’s goal: Reach 20 percent share in chip manufacturing by 2020!
Read more…

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