Thrive or survive…going for gold in post-recession recovery: Malcolm Penn @ IEF2010, Dresden

Malcom Penn, chairman and CEO, Future Horizons.

According to Malcom Penn, chairman and CEO, Future Horizons, 2010 — a barnstroming year — will likely see the global semiconductor industry grow by 31+ percent. He was delivering the company’s forecast at the ongoing 19th International Electronics Forum (IEF) 2010 in Dresden, Germany, which ends here tomorrow. He said it would take a disaster of the scale of Lehmann Brothers to derail this now!

Some of the other forecasts made by Malcolm Penn include:
* 2011: +28 percent; based on: peak of the structural cyclical boom (could stretch into 2012).
* 2012: +18 percent; based on: normal cyclical trash cycle starting 2H-2012 (1H-2013?).
* 2013: +3 percent based on: market correction in full flow (could be negative, cap ex overspend and inventory build depending).
* 2014: +12 percent; based on: start of the next cyclical recovery (single digit, if 2013 is negative).

Given the now unavoidable 2010-11 fab shortage, the growth upside for 2010-12 is huge!

The forecast track record of Future Horizons is quite interesting. As per forecasts made during the IFS2010 in Jan.2010, the chip fundamentals was said to be in very good shape. The industry was starting its recovery with shortages. Also, the ASPs had already stopped faling. The inventory levels were at an all-tme low. Finally, the capacity was tight, and spending, weak!

All of this added up to two years of very strong growth in prospect. Penn had said: “It doesn’t get much better than this. But, despite what the numbers say, still no-one believes beyond the next quarter!  “Ah but” is still driving the industry consensus!

Industry fundamentals don’t lie — believe in them or die! The capacity famine was instigated two+ years ago — well before the crasj, today’s shortage was inevitable. The recovery dynamics will continue to strengthen. Future Horizons’ forecast is now +31 percent ~$300 billion. The next trash dynamic has still not yet triggered. It is unlikely to happen before 2011, meaning, 2012 impact. However, the economic uncertainty remains the biggest risk. Also, the global financial system is fundamentally flawed.

E450EDL – European 450mm equipment demo line

Malcolm Penn, chairman and CEO, Future Horizons, sent me the Enable 450 newsletter. The goal of the Enable 450 is: Co-ordination Action to enable an effective European 450 mm Equipment and Materials Network. Here, I am presenting a bit about the E450EDL – European 450mm Equipment demo line.

Malcolm Penn

The aim of the ENIAC E450EDL key enabling technology pilot project is to continue the engagement of the European semiconductor equipment and materials industry in the 450mm wafer size transition that started with the ENIAC JU EEMI450 initiative and proceeded with subsequent projects funded with public money, amongst others NGC450, SOI450, EEM450PR.

The demo line resulting from this project will be such that it will enable first critical process module development by combining imec infrastructure with tools remaining at the site of the manufacturers (distributed pilot line). Multi-site processing will allow partners to participate in the world first 450mm integration studies and will be enabled by the controlled exchange of 450mm wafers between different sites.

The consortium comprises 41 members (from 11 different European countries) with many SMEs and research institutes. The project is organized in five technical work packages and a work package on management and co-ordination.

In the work package on integration and wafer processing first critical modules will be developed and will demonstrate the feasibility of processing on 450mm wafers. The main objective in the work package on lithography is to develop a wafer stage test-rig, which
can be implemented into the pilot line system. In the work package on front end equipment several tools will be developed such as a plasma ion implant module, a plasma dry etch module, a RTP system and a single wafer cleaning system.

Furthermore, in the dedicated work package on metrology 450mm metrology tool types will be developed for amongst others dielectric film thickness and composition measurements, defect inspection, defect review and analysis, optical critical dimensions (CD), overlay (mask and wafer) and 3D metrology.

Finally, from the work package on wafer handling and automation a set of equipment will be provided to support the demo line operations, and facilitate the R&D dedicated to process and metrology modules.

The project will last 36 months beginning on 1st of October 2013. The budget has been given at €204.6 million of which the ENIAC JU will fund €30.8 million. This project is still considering new members so if you are interested please contact ASML.

IMEC’s 450mm R&D initiative for nanoelectronics ecosystem

Roger de Keersmaecker, IMEC, Belgium, presented on IMEC’s 450mm R&D initiative in support of the nanoelectronics ecosystem at the Semicon Europa event in Dresden, Germany. IMEC has prepared an integrated 450mm R&D initiative. This will present an innovation engine supporting the global nanoelectronics ecosystem.

IMEC will play a key role in the acceleration of 450mm equipment development by timely installation of alpha/beta-demo tools for early learning, in an industry-relevant technology flow and ensuring patterning capability by early 2016. The 450mm R&D pilot line will enable full 450mm process capability for advanced nodes by early 2017.

Source: IMEC, Belgium.

Scaling
Logic device scaling slows down and ‘interim’ nodes are likely to be introduced. Disruptive devices are needed beyond 10nm. NAND flash is migrating from 2D floating gate to 3D SONOS device architecture.

Emerging memories are being introduced at 1x nm node. The parallel system scaling path done using 3D TSV technology is established and slowly gaining in momentum. Die cost is also exploding. There is an increasing need for an innovation pipeline, early design/technology co-optimization and cost reduction.

IMEC announced the opening of 300mm CR expansion on June 8, 2010. The cleanroom expansion is 450mm ready. There is 1,200m2 extra clean room space, and ready for EUV. Fab 1 is a 200mm pilot line and 5200 m2 CR (1750 m2 Class 1), with 24/7 continuous operation. Fab 2 is a 300mm pilot line with ball room, clean sub-fab, and 3200 m2 + 1200 m2 CR, also in 24/7 continuous operation.

IMEC started engineering new 450mm clean room in 2012. It has plans to stat constructing the clean room in 2013 and complete by 2015. The Flemish Minister of Innovation, Ingrid Lieten, announced to invest in the building of imec’s 450mm clean room facilities.

With the combination of a state-of-the-art 300mm clean room and the transition to 450mm, imec will be able to keep on delivering its partners topnotch research on (sub)-10nm devices enabling the future growth of the global nanoelectronics industry.

III-V high mobility semiconductors for advanced CMOS apps

Clement Merckling, IMEC, Belgium, presented on the epitaxial growth and in-situ passivation requirements for III-V high mobility semiconductors for advanced CMOS applications at the Semicon Europa in Dresden, Germany.

The motivations for III-V MOS transistors include higher electron carrier mobility (@ low-field), more efficient source injection, smaller energy bandgap, VDD scaling, band engineering capabilities, lower temperature processing, high-K gate first process possible and 3D compatible architecture.

IMEC III-V EPI.

The International Technology Roadmap for Semiconductors (ITRS) believes in Ge and III-V. IMEC epi + in-situ oxide ‘tool park’ involves MBE (molecular beam epitaxy) and MOVPE (metalorganic vapour phase epitaxy) III-V growth techniques. The III-V EPI is clustered with in-situ oxide capabilities.

The AIXTRON Crius 300mm looks at III-V selective epitaxial growth (III-As and III-P). The AMAT/RIBER III-V logic cluster 300mm looks at the III-V selective epitaxial growth (III-As and III-P), in-situ surface analysis, handled by RIBER ISA 300, and oxide (ALD and MBE) chambers in-situ. The RIBER MBE 49 cluster 200mm looks at the III-V solid source epitaxy (III-As and III-Sb) oxide chamber in-situ.

Main issues and challenges
Main issues for III-V integration include III-V integration on Si platform. There are all sorts of crystalline defects. Next, gate stack formation on MOS. It is much more difficult to passivate interfaces. Smaller bandgap, means, an increased Ioff due to band-to-band-tunneling.

Challenges with III-V heteroepitaxy on Si include Lattice mismatch, anti-phase boundaries (APB), mismatch stress relaxation and related defects such as dislocations at interface, and extended defects (threading arms, SFs). There are other defects caused at isolation interfaces, such as twins, stacking faults, facets, etc. Finally, there is interdiffusion at heterogeneous interfaces.

However, it is possible to achieve high quality heteroepitaxy by direct epitaxy using metamorphic buffer and defect confinement and wafers bonding. Strain relaxed buffer (SRB) is among the options for III-V materials integration at imec.

There can be InGaAs metamorphic buffer, with the MBE growth of low defect density and device quality III-V heterostructure using a suitable metamorphic buffer. Or, there can be III-Sb on Si by SS-MBE, that provides a route to relax III-V.

Defect confinement is possible via ‘necking effect’. The selective area growth (SAG) of III-V compounds via MOVPE (or CBE ?) means the defects are trapped at trench edges. The other way is dislocation trapping in narrow STI trenches for aspect ratio >2. There is low defect density material in the upper part of the trench.

Elimination of APBs for on-axis Si (001), Si recess engineering, is possible either via rounded-Ge surface or V-grooved surface. In the rounded-Ge surface, step creation is done by surface engineering of a Ge seed layer. Double steps on a Ge surface are more stable and easy to form with a lower thermal budget than on Si.

In V-grooved surface, (111) surface is obtained either by KOH or TMAH wet etching. Growth inside a pre-defined Si {111} enclosure promote initial III-V nucleation uniformity.

The ‘necking effect’ approach presents its own challenges. One, perpendicular view, where there is efficient defect necking effect with side wall and parallel view, which allows viewing high defect density.

Round-up 2010: Best of semiconductors

Right then, folks! This is my last post for 2010, on my favorite topic – semiconductors. If 2009 was one of the worst, if not, the worst year ever for semiconductors, 2010 seems to be the best year for this industry, what with the analyst community forecasting that the global semicon industry will surpass the $300 billion mark for the first time in its history!

Well, here’s a look at the good, the bad and the ugly, if available for otherwise what has been an excellent year, which is in its last hours, for semiconductors. Presenting a list of posts on semiconductors that mattered in 2010.

Top semiconductor and EDA trends to watch out for in 2010!

Delivering 10X design improvements: Dr. Walden C. Rhines, Mentor Graphics @ VLSID 2010

Future research directions in EDA: Dr. Prith Banerjee @ VLSID 2010 — This was quite an entertaining presentation!

Global semicon industry on rapid recovery curve: Dr. Wally Rhines

Indian semicon industry: Time for paradigm shift! — When will that shift actually happen?

Qualcomm, AMD head top 25 fabless IC suppliers for 2009; Taiwan firms finish strong!

TSMC leads 2009 foundry rankings; GlobalFoundries top challenger!

ISA Vision Summit 2010: Saankhya Labs, Cosmic Circuits are Indian start-ups to watch at Technovation 2010!

ISA Vision Summit 2010: Karnataka Semicon Policy 2010 unveiled; great opportunity for India to show we mean business! — So far, the Karnataka semicon policy has flattered to deceive! I’m not surprised, though!

Dongbu HiTek comes India calling! Raises hopes for foundry services!!

Indian electronics and semiconductor industries: Time to answer tough questions and find solutions — Reminds me of the popular song from U2 titled — “I still haven’t found what I’m looking for”!

What should the Indian semicon/electronics industry do now? — Seriously, easy to say, difficult to manage (ESDM)!  

Need to develop robust Indian semicon industry, led by local companies!

I came across an article titled “Global Semiconductor Companies Turn to India for Growth” published on India Knowledge@Wharton. Isn’t this reason why global semiconductor companies enter a specific market in the first place — to grow their own markets and regions? So, why should it be different with India?

India is very well known globally for its talent, chip design capabilities (especially in the Indian arms of the global semicon firms) and as the world’s embedded bastion!

This particular article is brilliantly written, and kudos the author. The clinching paragraph is tucked away at the end, starting with: “None of the global players, however, is currently looking at setting up a semiconductor fabrication plant, or “fab,” in India.”

What’s happened up until now in the Indian semicon industry? If one were to look at the Special Incentive Package Scheme (SIPS), which was introduced back in Sept. 2007 by the government of India, it was geared toward encouraging investments for setting up semicon fabs, and other micro and nanotechnology manufacturing industries in India!

It also defined the “ecosystem units” as units, other than a fab unit, for manufacture of semiconductors, displays including LCDs, OLEDs, PDPs, any other emerging displays; storage devices; solar cells; photovoltaics; other advanced micro and nanotechnology products; and assembly and test of all the above products.

A Karnataka Semicon Policy was announced in early Feb. 2010, during the India Semiconductor Association’s ( ISA) Vision Summit.

Next, the government of India’s thrust on solar/PV, via the Jawaharlal Nehru National Solar Mission (JN-NSM), has at least ensured the country’s solar/PV future.

What has happened since all of these policies? Really, nothing much, at least from the perspective of the Indian semicon industry. If it has, at least, I am unaware, and my apologies for this ignorance.

Of course, solar/PV seems to be going from strength to strength! Recently, NTPC Vidyut Vyapar Nigam Ltd (NVVN) put out the list of selected solar projects under the JN-NSM Phase 1, Batch 1. But that’s another story!

On this very blog, there are several posts that speak of India’s ability or inability to build a fab. At first, folks said that semicon fabs were on their way in India, and that the story isn’t disappearing. However, somewhere along the line, that particular vision took a beating and fabs simply disappeared from the Indian semicon radar!

Is the Indian semicon industry losing the plot?

Every time I see a new electronics or related segment being talked about in India — be it medical electronics/healthcare, RFID and smart cards, or for that matter, telecom, why do I get this feeling that the Indian semicon industry is slowly losing the plot? One hopes not!

The Indian technology industry is talking about practically everything, except semiconductors. Yes, I know we have a great pool of designers who work in the MNCs. Also, there are plenty of Indian design services companies doing excellent work (for others?). India’s strength in embedded is folk lore. Despite all of this, we are, where we were a few years ago!

Back in 2007, I’d done a story on how there were very remote chances of having a fab in India. Back then, some industry folks expressed  optimism that the fab story was not dead! However, that story is well and truly dead and buried, as of now! Today, no one wants to talk about a fab — fine, then!

Let’s do a reality check on India’s semiconductor score-card!

So far, India has not even managed to have a small foundry, forget about having a fab! Nor has the Indian industry managed to develop, nurture and build many (or any?) fabless companies of note. Can you tell me how many Indian fabless semicon companies have come up in the past five years? How many globally known Indian semicon product start-ups are there in our country for that matter? Okay, how many Indian semicon product start-ups are there in our country?

For that matter, how many ATMP units have come up in India? I do recall some industry folks mention in the past that there will be some ATMP units happening. Where are they? Okay, who, in India, is even trying to develop IP libraries?

Even if there is some success in building electronic product companes — that is and will be limited success! Neither is there any evidence of cutting-edge R&D being done in India. Please do not mix this up with the work being done by the Indian arms of the various MNCs.

Why, I don’t even think that the industry-academia partnership has developed substantially, leave alone mature!

If medical electronics, or some other related area, were to go on and succeed in the near future, it would be counted as a success for the Indian electronics industry, and not for the Indian semicon industry! Even if this did happen and it was counted as a ‘semicon success, can anyone make a guess as to how many of the chips going into such devices would be actually made in India – by Indian firms?

I had mentioned back in Feb. 2009  that “Can the Indian semicon industry dream big? (And even buy Qimonda?)! To refresh your memory, there was a large 300mm fab up for sale in Dresden, Germany. Well, even that never happened, or well, the Indian industry did not think it to be of much importance!

Back in August 2009, there was news about Texas Instruments (TI) placing a bid of $172.5 million for buying Qimonda’s 300mm production tools from its closed DRAM fab. While this highlighted TI’s focus on building the world’s first 300mm analog fab, I can’t stop wondering: what would have happened had an Indian investor actually bought Qimonda’s fab!

Perhaps, it would be better for the Indian semicon industry to stick to its globally known strengths of providing excellent semiconductor design services and embedded design services. At least, there will be clear direction in these areas.

Of course, there exist huge opportunities in all of the areas (or gaps) that I’ve touched upon.

This downturn was NOT a classic semiconductor bust and boom, ignore industry fundamentals at your peril: Future Horizons

According to Malcolm Penn, chairman and CEO, Future Horizons, May’s semiconductor sales were up 2.6 percent on April, 3.6 percent for ICs, continuing the steady sequential industry growth that started in January 2009, 17 months ago.

May’s results mean Q2-10 will show at least 8.3 percent quarterly growth over Q1-10, increasing the full year growth forecast to 36 percent. Given last year’s growth was minus 9 percent, mathematically this is a classic industry cycle. It is NOT, he insists.

At this point in the ‘recovery’, it is much more important to look at sequential and quarterly growth rates rather that the 12:12 rates, given the high double digit rates they show are just as misleading and irrelevant as the high double digit negative rates from this time last year.  The reality is they net each other out thereby highlighting the real nature of the current cycle.  This downturn was a pause, the recovery a restart, it was NOT a classic semiconductor bust and boom.

Future Horizons has been telling everyone very publicly that the industry recovery started in March 2009, first in the April 2009 edition of its Global Semiconductor Report, substantiated by a very long and detailed analysis at the Geneva IEF2009 Forum last October.

The recovery, together with ever-increasing substantiating data, has been a recurring theme in its  Global Semiconductor Monthly Report ever since, as well as at the Dresden IEF2010 event in May 2010.

Penn added: “At the same time I have been warning that industry was cutting back existing capacity far too much and too fast whilst simultaneously failing to invest in net new capacity. Our clear message always was that these two factors were a recipe for disaster. The disasters are now starting to happen.

“While we obviously do not expect firms to run their business based on what we say, if the market recovery really has taken firms by surprise, executives from the top down either failed to recognise the significance of the data we were drawing their attention to over the past 15 months or they simply made the decision to ignore it. Ignore the industry fundamentals at your peril.”

Recovery not quite classic!
Future Horizons clearly states that this recovery is not a classic recovery. On being quizzed further, Penn said, “it was a dead stop and restart, just like hitting the pause button on your remote, rather than a crash and rebuild.” This is perhaps the same reason why the recession is now being termed as a market interruption.

Future Horizons has also been warning that industry was cutting back on the existing capacity far too much and too fast, while simultaneously failing to invest in net new capacity. Is the semicon industry still on this path?

Penn added: “Spending has now resumed (since Jan. 2010) and cut backs have stopped, but there’s a one-year time delay before these will start to impact. Why? Lack of industry confidence, driven too much by short-term financial performance, risk averse management and shareholders, lemming factor, etc.”

The long-term ramifications, should the industry fail to invest in net new capacity, are loss of sales and market position/leadership to those firms who did invest (e.g. TSMC, Samsung).

Well, it seems the global semiconductor industry has not learned enough from the previous recessions!

Indian industry proposes to extend deadline of India’s semicon policy up to March 2015!

If you recall some time ago, I’d mentioned that the Indian semiconductor policy, which was announced back in 2007, had supposedly expired on March 31, 2010!

Now, the Indian industry has come up with recommendations, which include extending the Indian semicon policy up to March 2015!

For those who’ve come in late, back in September 2007, the Department of Information Technology, Ministry of Communication and IT, Government of India, came up with the Special Incentive Package Scheme (SIPS) to encourage investments for setting up semicon fabs, and other micro and nanotechnology manufacturing industries in India!

I am very grateful to the India Semiconductor Association (ISA) for sharing the details of the summary of inputs and amendments to India’s semiconductor policy.

As I mentioned, the recommendations include extending the Indian semicon policy up to March 2015!

This is fair enough, although I am sure it can extended for an even longer duration. Some other key recommendations include lowering of threshold limit for ATMPs and other ecosystem units, development of ecosystem, faster project appraisal time, etc. — and all of these are significantly necessary.

Should India have a fab? Why not?

There may be debates over whether India should have a fab or not! However, it is pleasing to see that there is still hope. Actually, why not have a fab or a foundry? Use it to serve the global market! The Indian semiconductor industry needs a serious rethink in terms of strategy. Maybe, it cannot survive on chip design services alone!

About 15 months ago (see Feb. 2009 archive on this blog), I had written “Can the Indian semicon industry dream big? (And even buy Qimonda?)! Well, time, I repeated that story! Here’s why!

If you have noted, early June 2010, ATREG, a division of Colliers International, has been appointed as advisor to market the sale of the advanced 300mm manufacturing campus of Qimonda in Dresden, Germany. Now, here’s a great chance for India or some Indian investor to grab this fab!

The highly accessible campus, located in the State of Saxony, features a state-of-the-art 300mm semiconductor fab including 281 advanced front-end semiconductor manufacturing tools, an advanced 300mm R&D fab and 360,000sq. ft. of administrative space. The campus also includes excess land, which could be used to construct a mirror-image of the existing 300mm fab, potentially doubling production capacity.

ATREG will focus on finding an operational purchaser for the facility. As originally constructed, the facility was capable of producing DRAM chips with a maximum volume of approximately 10,000 wafers per week.

The fully automated, world-class Qimonda Dresden 300mm wafer fab was built in 2001 and was the world’s first 300mm production facility. The state-of-the-art, 300mm R&D facility was built in 2005. The world-class 300mm equipment includes hundreds of advanced front-end manufacturing tools, many of which were used in volume production at 65nm. Though production has ceased, the cleanrooms remain in a production-ready state so that a potential purchaser could restart operations quickly.

There, I’ve said it!

There’s an opportunity waiting out there to be grabbed!! If India or someone in India does not move fast and attempt to buy, someone else, from somewhere else in world will surely buy this fab!

Let’s go back to February 2010, when the Karnataka State Government had announced its semicon policy. Perhaps, here’s an opportunity for Karnataka to take a lead!

Industry recommendations for semicon policy

Now, back to the recommendations from the ISA and the Indian semicon industry, which has been reproduced below:

Government of India Semiconductor Policy 2007: Summary of Inputs and amendments: proposed by committee members and industry.

1. Extension of the Policy:

The World Bank has confirmed that global economies are currently facing a recession. The global economic slowdown has severely impacted the semiconductor industry leading to piling up of inventories and reduced capital expenditure. While it is difficult to project the year of revival of the industry, the experts opine that the present situation for the semiconductor industry would last for at least two plus years. It is, therefore, proposed that the deadline of March 2010 may be extended till March 2015.

The extension will provide time:

* To market the Policy and improve the prospects of India to attract investments.

* To highlight the importance of the domestic market to the potential investors. It may be mentioned that the domestic semiconductor market (TM, i.e., the Total Market), as per the ISA-Frost & Sullivan India semiconductor market update report ( 2008-2010) is projected at $ 7.6 billion in the year 2010.

2. Lowering of threshold limit for ATMPs and other ecosystem units:

It is suggested that the threshold limit for certain categories of ecosystem units like ATMPs, optical LEDs, storage devices, LCD, FPD, Photovoltaics, fuel cells, micro and nano technology products (as defined in the SIPS) needs to be re-visited, as these units may not require large investment of the order of Rs. 1,000 crores.

Lower threshold limits (to qualify for the incentives available under the policy) is expected to generate interest for such categories of eco-system units, which has not been seen so far. This lowered threshold limit needs to be defined in consultation with industry experts.

The above areas, though low in technology vis-a-vis the technology required for wafer fab, form an important part in the value chain of chip manufacturing. Location of several of the manufacturing infrastructure in the above ecosystem areas in the country can also serve as a pull factor to set up wafer fabs.

It may be mentioned that countries like Hong Kong, Singapore, Malaysia, etc., took this approach initially and went on to have wafer fab facilities.

May 2010 global semicon update: Four quarters of sequential growth, yet still no one believes! Wake up, says Future Horizons

Here are the excerpts from the Global Semiconductor Monthly Report, May 2010, provided by Malcolm Penn, chairman, founder and CEO of Future Horizons. There are a lot of charts associated with this report. The report also covers market trends. Those interested to know more may contact Future Horizons.

March’s total semiconductor sales came in at $26,533 billion, slightly above our February expectation, closing the quarter at $69,181 billion. This was up 2.8 percent over Q4-2009 and one of the strongest first quarter performances ever in what is normally a negative growth quarter. We have now had four straight quarters of industry growth, yet still no one believes in the strength of the recovery!

Of course, something unexpected can always go wrong but the industry fundamentals have never been better aligned. Just as 2001 ushered in the conditions for the so-called the perfect (semiconductor) storm, 2010 is now wallowing in the inverse effect. Surprisingly, few firms are tough. Most are too timid, too cautious or too scared. Welcome to the brave new world of semiconductor company ambivalence and life-threatening risk aversion. “Hello”.

Future Horizons presented its review and forecast for the global semiconductor market on the first day of their ongoing 19th International Electronics Forum (IEF) 2010 in Dresden, Germany, May 6-8. Our overall prediction was that the 2010 chip market would have a barnstorming year; only a disaster of the Lehmann Brothers scale could now derail the market.

The overall five-year forecast presented was:

* 2010: +31 percent, with still some scope for upwards revision.

* 2011: +28 percent; based on: peak of the structural cyclical boom (could stretch into 2012).

* 2012: +18 percent; based on: normal cyclical trash cycle starting 2H-2012 (1H-2013?).

* 2013: +3 percent based on: market correction in full flow (could be negative, cap ex overspend and inventory build depending).

* 2014: +12 percent; based on: start of the next cyclical recovery (single digit, if 2013 is negative).

This would take the industry to around $300 billion in 2010 with a CAGR of 11.8 percent between 2010-14. It would also signal a 180-degree reversal in the industry’s fortunes following its ‘zero growth’ 2000-09 lost decade of growth. Moreover, despite the apparent bullishness of these numbers, given the now unavoidable 2010-11 fab shortage, the growth upside for 2010-12 is still huge.

The real tragedy however of what ought to have been good news for the industry was: (a) still, no one believes in the numbers; and (b) it was entirely predictable.

We first presented this forecast in January 2009, at the high point of the industry’s economic and business uncertainty. The only change we have made in the last 17 months was to increased 2010’s growth number from 15 to 31 percent number. Whilst all other industry analysts, business leaders, trade associations and economists alike wrestled with what was happening, we alone never lost faith in the industry or what the underlying fundamentals were saying.

This cycle’s forecast was the easiest we have ever had to make. All we had to do for the IEF meeting was to adjust for the fact that the 2009 recovery was faster and steeper than even we had dared to predict. The bottom line? The industry fundamentals may often get distorted by events but they never lie, ignore them at your peril.

We were ridiculed for our optimism in January 2009 and throughout the year when we stuck to our guns. We never stopped believing in the numbers however and never subscribe to industry fashion, trend or sentiment, despite this sometime being out on a limb with industry consensus.

We are proud of the fact only we got this analysis right but equally sad that no one had the courage to listen. This was not forecast luck either; this was simply doing what we do best, making a considered analysis and then believing in what the forecast tells us.