This is a summary by Malcolm Penn, chairman and CEO, Future Horizons. For those who wish to know more, please get in touch with me or Future Horizons.
It was all going so well at the beginning of March when January’s WSTS results were released. The oil and North African issues were being taken in their stride. Then, less than two weeks later, the earthquake and tsunami disaster struck Japan and by the close of the month, the Gaddafi Libyan regime was under western international airstrike siege.
Given the fragility of industry’s confidence since the Lehman Brothers crisis, the industry has weathered these ‘incidents’ with remarkable sanguinity, with concerns focused purely on supply not demand-side issues. In our view this underlines what we have been saying all along; the 2010 recovery and 2011 outlook were both stronger than most people thought.
The industry’s biggest problems in 2011 were always going to be supply not demand driven; the situation in Japan has simply amplified and accelerated their coming.
The chip industry took March’s one-two-three knocks with remarkable calm, hit first by the spike in oil prices following the politic unrest bordering on civil wars in North Africa, then the dreadful 11 March earthquake and Tsunami in Japan, culminating on 19 March with a multi-state coalition military intervention in Libya to implement United Nations Security Council Resolution 1973.
Last year, any of these events would probably have been enough to deal the industry a knockout blow, as with the September 2008 Lehman Brothers collapse; this time around, despite the still fragile global economic confidence, the industry seems to have taken these events in its stride.
Whilst it is far too early to quantify exactly what the industry impact will be, the oil price and North Africa situation pales into insignificance when compared with the aftermath of the earthquake and tsunami. Japan is too important a cog in the global electronics industry for its impact not to have serious global repercussions. It has also brought to a head the far deeper industry problems that we have long warned of – man-made in the corporate boardrooms – that could (should) have been avoided.
In this aspect, Japan’s disasters do have parallels with the Lehman Brothers collapse and its impact of worldwide finance; we hope that the current disruption to manufacturing worldwide from will force a rethink of how the world manages production. Read more…
Now, the Indian industry has come up with recommendations, which include extending the Indian semicon policy up to March 2015!
For those who’ve come in late, back in September 2007, the Department of Information Technology, Ministry of Communication and IT, Government of India, came up with the Special Incentive Package Scheme (SIPS) to encourage investments for setting up semicon fabs, and other micro and nanotechnology manufacturing industries in India!
I am very grateful to the India Semiconductor Association (ISA) for sharing the details of the summary of inputs and amendments to India’s semiconductor policy.
As I mentioned, the recommendations include extending the Indian semicon policy up to March 2015!
This is fair enough, although I am sure it can extended for an even longer duration. Some other key recommendations include lowering of threshold limit for ATMPs and other ecosystem units, development of ecosystem, faster project appraisal time, etc. — and all of these are significantly necessary.
Should India have a fab? Why not?
About 15 months ago (see Feb. 2009 archive on this blog), I had written “Can the Indian semicon industry dream big? (And even buy Qimonda?)! Well, time, I repeated that story! Here’s why!
If you have noted, early June 2010, ATREG, a division of Colliers International, has been appointed as advisor to market the sale of the advanced 300mm manufacturing campus of Qimonda in Dresden, Germany. Now, here’s a great chance for India or some Indian investor to grab this fab!
The highly accessible campus, located in the State of Saxony, features a state-of-the-art 300mm semiconductor fab including 281 advanced front-end semiconductor manufacturing tools, an advanced 300mm R&D fab and 360,000sq. ft. of administrative space. The campus also includes excess land, which could be used to construct a mirror-image of the existing 300mm fab, potentially doubling production capacity.
ATREG will focus on finding an operational purchaser for the facility. As originally constructed, the facility was capable of producing DRAM chips with a maximum volume of approximately 10,000 wafers per week.
The fully automated, world-class Qimonda Dresden 300mm wafer fab was built in 2001 and was the world’s first 300mm production facility. The state-of-the-art, 300mm R&D facility was built in 2005. The world-class 300mm equipment includes hundreds of advanced front-end manufacturing tools, many of which were used in volume production at 65nm. Though production has ceased, the cleanrooms remain in a production-ready state so that a potential purchaser could restart operations quickly.
There, I’ve said it!
There’s an opportunity waiting out there to be grabbed!! If India or someone in India does not move fast and attempt to buy, someone else, from somewhere else in world will surely buy this fab!
Let’s go back to February 2010, when the Karnataka State Government had announced its semicon policy. Perhaps, here’s an opportunity for Karnataka to take a lead!
Industry recommendations for semicon policy
Government of India Semiconductor Policy 2007: Summary of Inputs and amendments: proposed by committee members and industry.
1. Extension of the Policy:
The extension will provide time:
2. Lowering of threshold limit for ATMPs and other ecosystem units:
Lower threshold limits (to qualify for the incentives available under the policy) is expected to generate interest for such categories of eco-system units, which has not been seen so far. This lowered threshold limit needs to be defined in consultation with industry experts.
The above areas, though low in technology vis-a-vis the technology required for wafer fab, form an important part in the value chain of chip manufacturing. Location of several of the manufacturing infrastructure in the above ecosystem areas in the country can also serve as a pull factor to set up wafer fabs.
It may be mentioned that countries like Hong Kong, Singapore, Malaysia, etc., took this approach initially and went on to have wafer fab facilities. Read more…
Here are the excerpts from the Global Semiconductor Monthly Report, May 2009, provided by Malcolm Penn, chairman, founder and CEO of Future Horizons. There are a lot of charts associated with this report. Those interested to know more about this report should contact Future Horizons.
This will be followed by the update for June, and I am speaking with Malcolm Penn to find out more!
“At $14.085 billion, March’s IC sales were up 28.4 percent versus February, equivalent to plus 2.7 percent on a five-week month adjusted basis. Whilst this still puts the market down 31.2 percent versus March 2008, the momentum that started in January 2009 continues to steadily gain traction.
Overall, the ICs in Q1 were down just 13.4 percent in value, comprising a 19.6 percent fall in units offset by a whopping 7.8 percent gain in ASPs. At the total semiconductor level, sales came in at $17.271 billion, up 27.1 percent on February (1.7 percent on a 5-week month adjusted basis), slightly higher than our $17.019 billion April Report estimate.
Q1 was thus down only 15.7 percent on Q4, sizeably better than our 18.5 percent estimate. This is good news for industry… ‘ah but’ say the sceptics!
During our January 2009 International Forecast Seminar, we took the view that, from an economic recovery perspective, things would stabilise during the first half of the year, starting to gain traction by the end of 2009, given the dramatic economic stimuli since September 2008. The recovery would then accelerate quite fast in 2010-11, i.e. following a similar pattern as to what happened after the 2000 dot-com crash. There is every reason to believe this will still be the case.
Until recently, the big industry problem was uncertainty but there have been no horrible surprises now for several weeks and things do seem like we are bumping along the bottom. The global economy has stabilised; there have been no new gut-wrenching surprises and the ‘unknown unknowns’ in the economy have subsided. This means we are now left facing the ‘known unknowns’, which is clearly something that industry can adjust to and deal with.
Despite its severity, there are also many mitigating circumstances. At the personal level, this recession is quite like no other. For those without a job, or on short-time working, it is clearly bad news as no one is currently hiring. But, those with a job ironically have never been better off, with inflation, mortgage interest rates and repayments (the single biggest expense item on the personal expense budget) at rock bottom levels. This is very unlike the past recessions, which were accompanied by high inflation and cripplingly high interest rates.
Another factor is that no one really knows how much of the current GDP shrinkage (and for that matter the previous five-years above average growth) is (was) smoke and mirrors. With CDIs valued at 1.2x total world GDP in 2007 only to be written down to junk bond status the following year, the absolute GDP and growth rate numbers have been compromised. That makes it hard to judge what they mean from a top down perspective, more so when one considers the total electronics manufacturing industry’s contribution to world GDP is barely 3 percent.
Finally, even though cars, mobiles, PCs etc may fall in unit terms by ’15-30 percent’ this year, that still means ’70-85 percent of the market’ remains. With inventory levels everywhere in the value chain at all-time lows, we are currently back now building to demand from newly bought components, albeit some 20 percent lower than the 2008 highs.
At the chip level, the market is obviously driven by the economy but it also has its own drivers, especially capacity and ASP trends. Thus, whilst the existence of a link between the chip market and the economy is clear, mathematically the nature of this link is imprecise. Dislocations in growth dynamics are thus relatively frequent.
What then of our January 2009 quarterly growth pattern (Q1 -18 percent, Q2 -2 percent, Q3 +12 percentand Q4 +3 percent)? Clearly Q1, at -15.7 percent, was better than forecast which, if the rest of the growth pattern continues as planned, would rein in the full year market decline slightly from -28 to -25.3 percent, but still within the forecast margin of error. Q1 has thus reinforced, not altered, our January prognostications.
If Q1′s stronger momentum however carries through into Q2, Q2 would come in much stronger than our 2 percent decline, say to plus 2 percent instead. This would positively change our forecast dynamics with a further two percentage points improvement on the full year’s number, improving our forecast from -28 percent to -23.2 percent. Whilst we are not yet prepared to call for a formal forecast revision, the odds are in its favour and the downside forecast risks dispersed.
Clearly Q1 was the cyclical bottom; from here on out the growth trends will be up. Once the inventory purge is over, excess capacity will soon be absorbed with a corresponding strong recovery in utilisation rates. Given capex is currently at an 18-month all time low, with no near-term correction in prospect until late Q3-Q4 at the earliest, the industry will enter 2010 staring into a new net capacity famine.
We definitely will be revising our 2010 forecast up, from the current +15 percent to the mid-to high twenties.
The table C1 shows the quarterly semiconductor equipment sales trends for the period Q1-2008 through Q1-2009 inclusive. The total Q1-2009 equipment sales were $3,235 million, down 31.4 percent from Q4-2008, which in turn was down 28.1 percent from Q3-2008. This represents the biggest sequential falls in the history of the chip industry.Source: Future Horizons
Wafer processing equipment represented 76 percent of the total, just slightly higher than its 75 percent average. Total Q1-2009 investment represented only 7.3 percent of the quarterly semiconductor sales, although it must be remembered that an equipment sale in Q1-2009 will not produce incremental semiconductor sales until three quarters later, namely Q4-2009.
Q1-2009 wafer fab equipment sales were down a staggering 69.4 percent on Q1-2008, the fourth consecutive quarterly high double-digit drop, with further declines in the prospect. Capex levels are now running at levels not seen since the early 1990s when the overall chip market was one-third its current size.
As mentioned earlier, Q1-2009 was down 31.4 percent versus Q4-2008, on top of the three previous quarterly declines of 28.1 (Q4 vs Q3), 16.3 (Q3 vs Q2) and 25.8 (Q2 vs Q1) percent respectively. It should not be forgotten that these cutbacks were not triggered by the current chip market recession; the first two quarterly drops, namely Q2 and Q3-2008, took place against a backdrop of strong IC unit growth, i.e., well before the Q4-2008 chip market collapsed.
The cutbacks were a clear intent to engineer tight capacity, a strategy that would by now have bitten home were it not for the cruel interruption on the Q4-2008 market collapse. We have never before seen such an extensive cut back prior to a collapse; ironically this will help the recovery process, albeit for the wrong reasons. It will also underpin the underlying strategy — post recession IC capacity is going to be tighter than tight.
We also tracked the total semiconductor equipment sales by month since January 1988, both in absolute value and as a percent of semiconductor sales. One significant feature that can be seen from these trends is that the absolute value of the total semiconductor equipment sales has been significantly lower than the previous 1999-2000 investment peak, despite the fact the total semiconductor market has expanded in size.
During this same time period, the investment trend relative to the size of the total semiconductor market has also been trending well below its long-term 16.75 percent average, despite this being a period of heavy 300mm conversion.
The corresponding data for the Wafer Processing equipment sector, shows an increasing trend as a percent of semiconductor sales. This trend, however, is not a sign of excess investment, rather that the wafer processing portion is gaining overall market share, currently at around 75 percent of the total equipment spend, up from around 60 percent in the late 1980s.
We also tracked the total capex spent as a percent of semiconductor revenues on an annual basis since 1990-2008, and data but for the total semiconductor equipment spend. We also tracked the relative relationship between the wafer processing and total semiconductor spends.
These show that a higher proportion of revenues are being spent on the wafer processing sector, a trend that we believe is likely to continue.
We believe that the current levels of capex expenditure are unprecedentedly low and cannot be wholly accounted for improvements in productivity and factory loading. Even if they are, these gains are one-off improvements; once they have been realised there is no more gain in prospect and expenditure levels will return to ‘normal’ trends.
We tracked the wafer processing equipment spend versus the corresponding increase in capacity on a quarterly basis since Q1-1999 but with the capacity increase delayed by three quarters.
Once the three-quarter slippage in introduced into the equation, the overlay of the two curves, whilst not perfect, is a very good fit. In short, it takes three quarters for increases in wafer processing spend to translate into new capacity. This is the time it takes to hook up and calibrate the kit and make it volume production ready. Add to this an additional one-quarter delay through wafer fab and assembly process, the net result is a one year delay from wafer processing spend to incrementally more IC shipments out.
Adding in a further one-quarter lead-time for equipment delivery, results in a typically 15 month delay for an existing clean room structure from wafer processing investment decision to increased unit sales, one year longer still if a new building is required.
These long lead-times, however, have a positive side in that one has excellent visibility three quarters out into how much additional capacity is due to come on stream, just by analysing the front-end capex spend numbers. Once the frontend
capex is committed, the addition capacity is inevitable, needed or not, the difference being determined by the capacity utilisation number.
One is thus making an investment decision based on a unit demand forecast 12 months down the road, which would not be so problematic were demand more predictable.
As can be seen, however, from the unit sales charts in the Market Summary section of this report, IC unit demand fluctuates violently from its underlying long-term ten percent per year annual growth rate on a month-by-month basis, quarter-by-quarter basis, not withstanding the inevitable — and unavoidable — routing inventory adjustments.
The biggest single problem with semiconductor capex is thus both the long time delay from investment decision and additional IC units out and the non-linearity of the month-by-month unit demand. It is this mismatch that gives rise to the investment uncertainty. Getting the investment timing right, however, is not an exact science; there are bound to be ongoing capacity mismatches within this overall favourable trend.
Entering 2009, the current new capacity investment is trending well below the long-term trend, and is projected to slow even more so in 2009 as the economic recession bites home. This means over-investment is not going to accentuate the current industry downturn, as has so often happened before.
This time it seems investment has been deliberately slowed in order to improve the return on capital employed. The seeds have also been sown for the next market shortage in 2010-11. Foundry wafer prices will rise; dust down the ‘makebuy’ Excel spreadsheets … the ‘fablite’/IDM debate dynamics has yet to run its course.”
Xilinx Inc. has taped-out the first 20nm All Programmable Device with first UltraScale ASIC-class programmable architecture. It is said to be the semiconductor industry’s first 20nm device, and the PLD industry’s first 20nm All Programmable device. Xilinx implemented the industry’s first ASIC-class programmable architecture called UltraScale.
These milestones expand on Xilinx’s industry first 28nm tape-out, All Programmable SoCs, All Programmable 3D ICs, and SoC-strength design suite. Xilinx already has several firsts in the 28nm space, such as:
* First 28nm tape-out.
* First All Programmable SoC.
* First All Programmable 3D IC.
* First SoC-strength design suite.
Neeraj Varma, director-Sales, India, said that Xilinx’s global market share in the 28nm portfolio was 65 percent in March 2013. With the launch of the industry’s first 20nm All Programmable Device with first UltraScale ASIC-class programmable architecture, there are improvements such as 1.5-2x performance and integration, and a year ahead of the competition. It handles massive I/O bandwidth, massive memory bandwidth, massive data flow and routing, and fastest DSP processing. The architecture will scale — from monolithic to 3D IC, planar to FinFET, and ASIC-class performance.
The UltraSCALE architecture points to high performance smarter systems. For example, 1Tps in OTN networking, 8K in digital video, LTE-A in wireless communications, and digital array in radar. There will be requirements for massive packet processing over 400 Gbps wire-speed, massive data flow over 5Tbps, as well as massive I/O and memory bandwidth over 5Tbps, and DSP performance over 7 TMACs.
The mandate for ASIC-class programmable architecture is to remove bottlenecks for massive data flow and smart processing, high throughput with low latency, and efficient design closure with greater than 90 percent utilization without performance degradation. These are the benefits of applying leading edge ASIC techniques in a fully programmable architecture.
ASIC-like clocking maximizes performance margin for highest throughput. UltraSCALE ASIC-like clocking enables clock placement virtually anywhere on the die, making the clock skew problem go away. Also, highly optimized critical paths remove bottlenecks in DSP and packet processing. There is greatly enhanced DSP processing, high-speed memory cascading, and hardened IP for I/O intensive functions.
Next generation power management features also enable a leap in performance. The process node is up to 35 percent static at 20nm. There are more buffers for granular or coarse clock gating. Block RAM is dynamic power gating, hardened cascading. For transceivers, there are architectural optimizations. There is efficient packing and utilization of the logic fabric. For DSP, there are wider multipliers and fewer blocks per function. As for memory, there is DDR4, which operates at 1.2v vs.1.5v, voltage scaling.
The Xilinx KINTEX UltraSCALE will power 4×4 mixed-mode radios, 100G traffic manager NICs, super high-vision processing, 256-channel ultrasound and 48-channel T/R radar processing. The Xilinx VIRTEX UltraSCALE will power 400G OTN switching, 400G transponder, 400G MAC-to-Interlaken bridge, 2x100G muxponder and ASIC prototyping.
Xilinx worked with TSMC to infuse high-end FPGA requirements into the TSMC 20SoC development process, just as it had done in the development of 28HPL. The Xilinx Vivado Design Suite early access supporting UltraScale architecture-based FPGAs is now available. Initial UltraScale devices will be available in Q4-2013.
Last week (March 11, 2013), Cadence Design Systems Inc. entered into a definitive agreement to acquire Tensilica Inc., a leader in dataplane processing IP, for approximately $380 million in cash.
With this acquisition, Tensilica dataplane processing units (DPUs) combined with Cadence design IP will deliver more optimized IP solutions for mobile wireless, network infrastructure, auto infotainment and home applications.
The Tensilica IP also complements industry-standard processor architectures, providing application-optimized subsystems to increase differentiation and get to market faster. Finally, over 200 licensees, including system OEMs and seven of the top 10 semiconductor companies, have shipped over 2 billion Tensilica IP cores.
Talking about the rationale behind Cadence acquiring Tensilica, Pankaj Mayor, VP and head of Marketing, Cadence, said: “Tensilica fits and furthers our IP strategy – the combination of Tensilica’s DPU and Cadence IP portfolio will broaden our IP portfolio. Tensilica also brings significant engineering and management talent. The combination will allow us to deliver to our customers configurable, differentiated, and application-optimized subsystems that improve time to market.”
It is expected that the Cadence acquisition will also see the Tensilica dataplane IP to complement Cadence and Cosmic Circuits’ IP. Cadence had acquired Cosmic Circuits in February 2013.
What are the possible advantages of DPUs over DSPs? Does it mean a possible end of the road for DSPs?
As per Mayor, DSPs are special purpose processors targeted to address digital signaling. Tensilica’s DPUs are programmable and customizable for a specific function, providing optimal data throughput and processing speed; in other words, the DPUs from Tensilica provide a unique combination of customized processing, plus DSP. Tensilica’s DPUs can outperform traditional DSPs in power and performance.
So, what will happens to the MegaChips design center agreement with Tensilica? Does it still carry on? According to Mayor, right now, Cadence and Tensilica are operating as two independent companies and therefire, Cadence cannot comment until the closing of the acquisition, which is in 30-60 days.
This is a continuation of my coverage of the fortunes of the global semiconductor industry. I would like to acknowledge and thank Mike Cowan, an independent semiconductor analyst and developer of the Cowan LRA model, who has provided me the latest numbers.
According to the WSTS’s Jan 2013 HBR (posted on March 8th, 2013), January 2013’s actual global semiconductor sales came in at $22.824 billion. This actual sales result for January is 2.9 percent higher than January’s sales forecast estimate, namely $22.180 billion.
Plugging January’s actual sales number into the Cowan LRA forecasting model yields, the following quarterly, half-year, and full year sales and sales growth forecast expectations for 2013 compared to 2012 sales depicted in the table.
It should be highlighted that with last month’s publishing of the final 2012 sales result by the WSTS, the Cowan LRA Model for forecasting global semiconductor sales was updated to incorporate the full complement of 2012′s monthly sales numbers, thereby capturing 29 years of historical, global semiconductor (actual) sales numbers as gathered, tracked and published each month by the World Semiconductor Trade Statistics (WSTS) on its website.
As described last month, the necessary mathematical computations required in order to update the complete set of linear regression parameters embedded in the Cowan LRA forecasting model for determining future sales were carried out. The newly derived set of linear regression parameters therefore reflect 29 years (1984 to 2012) of historical global semiconductor sales as the basis for predicting future quarterly and full year sales and sale growth forecast expectations by running the Cowan LRA Model.
Therefore, the table given above summarizes the model’s latest, updated 2013 sales and sales growth expectations reflecting the WSTS’s January 2013′s actual sales as calculated by the model’s newly minted set of linear regression parameters.
Note that the latest Cowan LRA Model’s expected 2013 sales growth of 6.6 percent relative to 2012 final sales ($291.562 billion) is more bullish than the WSTS’s adjusted Autumn 2012 sales growth forecast of 3.9 percent as well as the WSTS’s Autumn 2012′s original forecasted sales growth of 4.5 percent which was released back in November of last year.
In addition to forecasting 2013’s quarterly sales estimates the Cowan LRA Model also provides an forecast expectation for February 2013’s sales, namely $22.436 billion. This sales forecast yields a 3MMA forecast for February of $23.571 billion assuming the no or minimal sales revision is made to January’s actual sales.
Finally, the table provided below details the monthly evolution for 2013’s sales and sales growth forecast predictions as put forth by the Cowan LRA forecasting model dating back to September of last year.
Note that the most recent 2013 sales growth forecast is up compared to the previous two forecasts of 5.5 percent and 3.6 percent, respectively.
It should be mentioned that the previous 2013’s sales growth forecast for Dec 2012, namely 3.6 percent, was based upon a sales forecast estimate for Jan 2013 versus the latest sales growth forecast estimate of 6.6 percent, which utilizes Jan’s actual sales result just released in the WSTS’s January 2013 HBR, Historical Billings Report.
Here are highlights of the Union budget 2013-14 presented by P. Chidambaram, union Finance minister, Government of India. Also, is there finally, some hope for the Indian semiconductor industry?
* Doing business with India should be easy, friendly and helpful.
* Foreign investments must be encouraged.
* Accelerating growth is the main goal.
* Need to encourage FDI in consonance with economic priorities.
* To target $1 trillion in infrastructure in the 12th plan.
* There are incentives for semiconductor wafer fab manufacturing.
* There will be appropriate incentives for the semiconductors industry, including zero customs duty on plants and machineries.
* To increase allocation for science and atomic departments.
* Indian Institute of BioTechnology to be set up at Ranchi.
* Non-conventional wind energy sector needs help.
* Will encourage cities to take up waste-energy projects through PPPs.
* Plan being developed for Chennai-Bangalore industrial corridor.
* Preparatory work started for Bengalooru-Mumbai Industrial Corridor.
* To launch two new industrial cities in Gujarat and Maharashtra.
* Propose to continue with the Technology Upgradation funds scheme for the textile sector.
* India’s first women’s public sector bank to be set up.
* Woman’s bank license to be in place by October, 2013.
* All PSU banks branches to have ATMs by March, 2014.
* Zero customs duty for electrical plants and machinery proposed.
* Higher customs duty on set-top boxes.
* To provide more than Rs 4200 crore for medical studies.
* To allocate Rs 1106 crore for alternative medicine industry.
* To allocate 100 crores to AMU, BHU, TISS-Guwahati and INTACH.
* Government to set up National Institute of Sports Coaches in Patiala.
* To expand private FM radio to 294 cities.
* To auction 839 licenses for FM network to cover all India.
* Government to construct power transmission system from Srinagar to Leh at the cost of Rs 1,840 crore, Rs 226 crore provided in current budget.
* Mobile phones priced more than Rs. 2,000 will see duty raised by 6 percent.
* Extend tax benefit to electrical vehicles.
* A company investing Rs 100 crore or more in plant and machinery in April 1, 2013 to March 31, 2015 will be allowed 15 percent investment deduction allowance apart from depreciation.
* SEBI to simplify KYC norms governing foreign investors.
* SEBI will simplify procedures for entry of foreign portfolio investors to invest in India.
* Higher outlay on waste management.
* Government to monitor cost of doing business in India.
* Zero customs duty proposed for electrical plants and machinery.
* Proposal to provide Rs. 800 crore for the Ministry of New & Renewable Energy for generation-based incentive for wind energy projects as the non-conventional wind energy sector deserves incentives.
* Government will provide low interest bearing funds from the National Clean Energy Fund (NCEF) to IREDA to on-lend to viable renewable energy projects. The scheme will have a life span of five years.
* Proposal to set apart Rs. 2,000 crore and asked the National Innovation Council to formulate a scheme for the management and application of the fund.
Coming to semiconductors, the world today is discussing the viability of 450mm fabs. I am well aware that Malcolm Penn has been pushing for 450mm fabs across Europe. I believe that one such fab will cost in the excess of $25 billion, if not more. So, who will invest that kind of money in India? Do we have clean water and 24-hour electricity supply in any state that’s required for such a fab? What will this so-called 450mm fab manufacture? Does the fab have a blueprint in place? Well, have we even addressed any of these questions?
This is a continuation of my coverage of the fortunes of the global semiconductor industry. I would like to acknowledge and thank Mike Cowan, an independent semiconductor analyst and developer of the Cowan LRA model, who has provided me the latest numbers.
With the ‘closing out’ of the final, overall sales result for 2012 by the WSTS, the Cowan LRA model for forecasting global semiconductor sales has been updated to include the full complement of 2012′s monthly sales numbers, thereby incorporating 29 years of historical, global semiconductor (actual) sales numbers as gathered, tracked and published each month by the World Semiconductor Trade Statistics (WSTS) organization.
The necessary mathematical computations required to update the complete set of linear regression parameters embedded in the Cowan LRA forecasting model have been carried out.
The newly derived set of linear regression parameters reflect 29 years (1984 to 2012) of historical global semiconductor sales numbers as a basis of predicting future quarterly and full year sales and sale growth forecast expectations by exercising the Cowan LRA model.
Therefore, the table given here summarizes the model’s latest 2013 sales and sales growth expectations as a function of the model’s range (low, expected and high) for January 2013′s sales forecast estimates as generated by the newly, updated model’s linear regression parameters.
It is estimated that in 2013, the global semiconductor industry is likely to reach $302.022 billion, a growth of 3.6 percent.
Note that next month’s forecast will be based on January 2013′s actual sales number, which is anticipated to be released by the WSTS at the end of the first week in March. Once posted, the model will be rerun to yield the quarterly and full year sales, and sales growth expectations for 2013, respectively.