According to Malcom Penn, chairman and CEO, Future Horizons, 2010 — a barnstroming year — will likely see the global semiconductor industry grow by 31+ percent. He was delivering the company’s forecast at the ongoing 19th International Electronics Forum (IEF) 2010 in Dresden, Germany, which ends here tomorrow. He said it would take a disaster of the scale of Lehmann Brothers to derail this now!
Some of the other forecasts made by Malcolm Penn include:
* 2011: +28 percent; based on: peak of the structural cyclical boom (could stretch into 2012).
* 2012: +18 percent; based on: normal cyclical trash cycle starting 2H-2012 (1H-2013?).
* 2013: +3 percent based on: market correction in full flow (could be negative, cap ex overspend and inventory build depending).
* 2014: +12 percent; based on: start of the next cyclical recovery (single digit, if 2013 is negative).
The forecast track record of Future Horizons is quite interesting. As per forecasts made during the IFS2010 in Jan.2010, the chip fundamentals was said to be in very good shape. The industry was starting its recovery with shortages. Also, the ASPs had already stopped faling. The inventory levels were at an all-tme low. Finally, the capacity was tight, and spending, weak!
All of this added up to two years of very strong growth in prospect. Penn had said: “It doesn’t get much better than this. But, despite what the numbers say, still no-one believes beyond the next quarter! “Ah but” is still driving the industry consensus!
Industry fundamentals don’t lie — believe in them or die! The capacity famine was instigated two+ years ago — well before the crasj, today’s shortage was inevitable. The recovery dynamics will continue to strengthen. Future Horizons’ forecast is now +31 percent ~$300 billion. The next trash dynamic has still not yet triggered. It is unlikely to happen before 2011, meaning, 2012 impact. However, the economic uncertainty remains the biggest risk. Also, the global financial system is fundamentally flawed. Read more…
Future Horizons has revised its 2009 global semiconductor industry forecast to -14 percent growth (+/- 2 percentage points). This was revealed by Malcolm Penn, Chairman & CEO, Future Horizons, while delivering the company’s forecast at the ongoing 18th International Electronics Forum (IEF) 2009 in Geneva, Switzerland, which ends here tomorrow. “He said, “It’s all about good management … only the bad times tell!”
Some of Penn’s other forecast summaries include:
* Economic recovery is said to have already started from 2H-2009.
* Further ‘50 percent’ cap ex reduction.
* Memory price recovery 2H-2009.
* Still lots Of blood on the road near-term
* Strong will get stronger as weak go to the wall.
* Watch for tight capacity starting 2H-2009.
* Crisis is the time to implement change (brings out the best and worst).
* R&D/new products/sound marketing will win (not counting pencils and scrapping the free coffee).
Outlook for 2010 and beyond
Penn also presented the company’s outlook for the global semiconductor industry for 2010 and beyond. These include:
* 2010: +19 percent based on: continuing recovery momentum (NB … this could be a lot, lot higher).
* 2011: +28 percent based on: peak of the structural cyclical boom (NB … this could stretch into 2012).
* 2012: +18 percent based on: normal cyclical market correction starting 2H-2012 (1H-2013?).
* 2013: +3 percent based on: market correction in full flow (NB … this could be negative).
The year 2014 could well see the start of the next cyclical recovery! Given the impending 2010 fab shortage, the upside for 2010-12 is said to be huge.
The 2009 forecast – how did we do so far?
First, let’s look at the 2008 forecasts:
Q4-08 Forecast (Jan): -22.5 percent, making overall Year -2.3 percent
* Q4 (Dec) Guidance: (Intel -20 percent, Nvidia -40/-50 percent, Broadcom -20percent/-23 percent. TSMC -30 percent, Others –20/-50 percent-ish
* Q4-08 Actual: -24.2 percent, making 2008 YoY -2.8 percent (both slightly worse).
Now, on to the 2009 forecasts:
* 2009 forecast (Jan): -28 percent.
* Q1 -20 percent (continuing Q4’s decline, but at a slower rate).
* Q2 -2 percent (market settling down and decline bottoming out).
* Q3 +12 percent (normal, but slightly subdued seasonal and structural growth).
* Q4 +3 percent (normal 4th quarter seasonal slowdown).
* Q1-09 Actual: -15.3 percent (better than Jan. forecast). Jan., not March, saw start of correction to Q4-08’s over-reaction.
* Q2-09 Actual: +16.9 percent (Much better than Jan. forecast). Also, Q1 (not Q2) was the trough with a strong April-June rebound.
* Q3-09 Outlook: +12 percent (No change In Jan. or Jul. forecast). The Q2 inventory correction spurt over with ‘normal’ seasonal growth.
* Q4-09 Outlook: +3 percent (No change in Jan. or Jul. forecast). The normal 4th quarter seasonal slowdown.
2009 Forecast (Jul): -14 percent (Much better than Jan. forecast/no change from Jul.). Minor downside risks (Q3 +8 percent and Q4 +2 percent. making year -16 percent). There is a significant upside potential (Q3 +16 percent and Q4 +4 percent, making year -12 percent).
What’s changed since January’s IFS2009?
According to Malcolm Penn, Future Horizons’ ‘Rose Glass’ scenario came true! He said: “We correctly forecast the pattern of the recovery. The rebound came one quarter earlier than expected.” Given below is a snapshot of what’s happened since the IFS2009 in January.
In January, the world was reeling from Q4’s unprecedented collapse with December peppered with last minute Q4 downward guidance warnings. Everyone was affected – from Intel downward, the collapse was a total meltdown and completely across the board – covering all markets and regions.
Next, there was absolutely zero visibility into the first quarter guidance. Many firms refused to even comment. Some said, “We Simply Have No Idea!” Others offered such a wide range of options that the guidance was meaningless.
The December’s WSTS results (released early Feb.) showed December (and hence, Q4) slightly worse than the Oct/Nov momentum at -24.2 percent (vs. –22.5 percent). The March’s WSTS results (released early May) showed March (and hence, Q1) slightly better than the Jan/Feb momentum.
In brief — from meltdown (Q4-08) to stabilisation (Q1-09) and rebound (Q2-09) in three quarters — even for the chip industry dynamics, this was unprecedented, said Penn.
I will be adding more here, a bit later… stay tuned!
SEMICON Europa was recently held in Dresden, Germany on Oct. 8-10, 2013. I am extremely grateful to Malcolm Penn, chairman and CEO, Future Horizons for sharing this information with me.
SEMICON Europa included a supplier exhibition where quite a few 450mm wafers were on display. One highlight was a working 450mm FOUP load/unload mechanism, albeit from a Japanese manufacturer. These exhibits did illustrate though that 450mm is for real and no longer a paper exercise. There was also a day-long conference dedicated to 450mm in the largest room. This was crowded throughout the time and a large number of papers were given.
Paul Farrar of G450C began with a presentation about Supply Chain Collaboration for 450mm. His key message was there are 25 different tools delivered to G450C of which 15 are installed in the NFN cleanroom. This number will grow to 42 onsite and 19 offsite by Q1 2015.
He stated that Nikon aims to have a working 193i litho machine in 2H 2014 and install one in Albany in 1H 2015. Farrar also reported a great improvement in wafer quality which now exceed the expected M76 specification, and prime wafers to the M1 spec should be available in Q3 2014. There has also been good progress on wafer reclaim and it is hoped some wafers can be reused up to 10 times, although at least three is the target.
Metrology seems to be one of the most advanced areas with eight different machines already operational. The number of 450mm wafers in their inventory now stands at over 10,000 with these moving between the partners more rapidly. It was immediately noticeable from Farrar’s speech that G450C is now recognising the major contribution Europe is making to 450mm and is looking for more collaborations.
Facilities part of F450C
Peter Csatary of M&W then dealt with the facilities part of G450C, known as F450C. This group consists of:
• M&W (co-ordination)
• Mega Fluid Systems
• Haws Corp.
• Air Liquide
• Ceres Technlogies
• CS Clean Systems
F450C is seen as streamlining communications with the semiconductor companies and their process tool suppliers. The group will focus on four key areas, namely Environmental Footprint, Facility Interface Requirements, Cost and Duration, and Safety and Sustainability.
One interesting point raised was that 450mm equipment is inherently more massive and one suggestion has been that ceiling mounted cranes will be required to install and remove equipment. This of course means that fab roofs would need to be stronger than previously. This topic was discussed at the latest F450C meeting subsequent to this conference.
Another new concept is that of a few standardised 3D templates and adapter plates to allow fab services to be pre-installed before the equipment is placed. An interesting point made elsewhere by M&W is that the current preference is to place a fab where there are already other fabs in existence so that the infrastructure to transport products, materials and services is already in place, as are basic utilities such as power, natural gas and water supply.
However, the scale of the expected utility demand at 450 mm ups the stakes as for example a large 300 mm facility uses about 4 million gallons of water per day, whereas a 450 mm fab will use almost double that, putting immense strain on a location’s infrastructure should there be other fabs in the region. This could affect future site selections.
An outcome of this phenomenon is that the reduction, reclaim and re-use of materials will no longer be driven only by the desire to be a good corporate citizen, but will also be driven by cost control and to ensure availability of required resources such as power, water, specialty gases and chemicals.
Future Horizons hosted the 22nd Annual International Electronics Forum, in association with IDA Ireland, on Oct. 2-4, 2013, at Dublin, Blanchardstown, Ireland. The forum was titled ‘New Markets and Opportunities in the Sub-20nm Era: Business as Usual OR It’s Different This Time.” Here are excerpts from some of the sessions. Those desirous of finding out much more should contact Malcolm Penn, CEO, Future Horizons.
The global interest in graphene research has facilitated our understanding of this rather unique material. However, the transition from the laboratory to factory has hit some challenging obstacles. In this talk I will review the current state of graphene research, focusing on the techniques which allow large scale production.
I will then discuss various aspects of our research which is based on more complex structures beyond graphene. Firstly, hexagonal boron nitride can be used as a thin dielectric material where electrons can tunnel through. Secondly, graphene-boron nitride stacks can be used as tunnelling transistor devices with promising characteristics. The same devices show interesting physics, for example, negative differential conductivity can be found at higher biases. Finally, graphene stacked with thin semiconducting layers which show promising results in photodetection.
I will conclude by speculating the fields where graphene may realistically find applications and discuss the role of the National Graphene Institute in commercializing graphene.
The key challenge for future high-end computing chips is energy efficiency in addition to traditional challenges such as yield/cost, static power, data transfer. In 2020, in order to maintain at an acceptable level the overall power consumption of all the computing systems, a gain in term of power efficiency of 1000 will be required.
To reach this objective, we need to work not only at process and technology level, but to propose disruptive multi-processor SoC architecture and to make some major evolutions on software and on the development of
applications. Some key semiconductor technologies will definitely play a key role such as: low power CMOS technologies, 3D stacking, silicon photonics and embedded non-volatile memory.
To reach this goal, the involvement of semiconductor industries will be necessary and a new ecosystem has to be put in place for establishing stronger partnerships between the semiconductor industry (IDM, foundry), IP provider, EDA provider, design house, systems and software industries.
This presentation looks at the development of the semiconductor and electronics industries from an African perspective, both globally and in Africa. Understanding the challenges that are associated with the wide scale adoption of new electronics in the African continent.
Electronics have taken over the world, and it is unthinkable in today’s modern life to operate without utilising some form of electronics on a daily basis. Similarly, in Africa the development and adoption of electronics and utilisation of semiconductors have grown exponentially. This growth on the African continent was due to the rapid uptake of mobile communications. However, this has placed in stark relief the challenges facing increased adoption of electronics in Africa, namely power consumption.
This background is central to the thesis that the industry needs to look at addressing the twin challenges of low powered and low cost devices. In Africa there are limits to the ability to frequently and consistently charge or keep electronics connected to a reliable electricity grid. Therefore, the current advances in electronics has resulted in the power industry being the biggest beneficiary of the growth in the adoption of electronics.
What needs to be done is for the industry to support and foster research on this subject in Africa, working as a global community. The challenge is creating electronics that meet these cost and power challenges. Importantly, the solution needs to be driven by the semiconductor industry not the power industry. Focus is to be placed on operating in an off-grid environment and building sustainable solutions to the continued challenge of the absence of reliable and available power.
It is my contention that Africa, as it has done with the mobile communications industry and adoption of LED lighting, will leapfrog in terms of developing and adopting low powered and cost effective electronics.
Personalized, preventive, predictive and participatory healthcare is on the horizon. Many nano-electronics research groups have entered the quest for more efficient health care in their mission statement. Electronic systems are proposed to assist in ambulatory monitoring of socalled ‘markers’ for wellness and health.
New life science tools deliver the prospect of personal diagnostics and therapy in e.g., the cardiac, neurological and oncology field. Early diagnose, detailed and fast screening technology and companioning devices to deliver the evidence of therapy effectiveness could indeed stir a – desperately needed – healthcare revolution. This talk addresses the exciting trends in ‘PPPP’ health care and relates them to an innovation roadmap in process technology, electronic circuits and system concepts.
Here is a view from Mike Bryant of Future Horizons, taken from the Enable450 newsletter, for which, I must thank Malcolm Penn, chairman and CEO.
This is a question often asked by journalists and others not directly involved in 450mm technology, and indeed was one of the questions that formed the basis of the SMART 2010/062 report Future Horizons produced for the European Commission.
It is also a question every new 450mm project has to answer in its funding request to the European Commission, and whilst working on the Bridge450 submission we realised the arguments have become rather unclear over time. The following gives some insight and clarity into the question.
In 1970, Gordon Moore re-formulated predictions on computer storage by Turing and others into a simple statement that the number of transistors per unit area of an IC will double every two years for at least the next ten years. This became known as “Moore’s Law” and apart from the occasional hiccup has in fact been followed for the past forty years. Note that Moore never suggested a doubling in density every 18 months, this time period coming from a different statement concerning transistor performance.
Of course, doubling the number of transistors would not be that helpful if the price per unit area also doubled. The semiconductor industry has thus strived to maintain the cost of manufacturing per unit area at a constant price, and analysed over time has done a remarkable job in maintaining this number such that the ASP of logic devices has sat at around $9 per square centimetre for this whole period during which the cost of everything else including the equipment, materials and labour used to make the IC have increased, labour costs in particular increasing by a factor of around five times.
The actual cost of processing a wafer appreciates by around 6 percent per annum due to technology cycle upgrades and insertions, for example in the past the replacement of aluminium interconnects with copper or more recently the move to double patterning for lithography of critical layers. Several approaches have been used to maintain a constant area cost, these being:
Improvements in yield – this obviously reduces wastage and vast improvements have been made in this field though yields are now so good that the problem is more maintaining these levels with each new process node rather than improving them further.
Increasing levels of automation – this is still an area undergoing improvement but again we have entered an area of diminishing returns on the investment required.
Introducing larger wafer sizes – this has been performed on an irregular basis over the history of the semiconductor industry. The increase in surface area reduces many but not all of the processing costs whilst material costs tend to stay fairly constant per unit area. Thus at the 300mm transition the increase in area by 2.25 times gave a cost per unit area reduction of 30 percent, approximately compensating for the increased processing costs acquired over the 90nm and 65nm nodes.
Malcolm Penn, chairman and CEO, Future Horizons, sent me the Enable 450 newsletter. The goal of the Enable 450 is: Co-ordination Action to enable an effective European 450 mm Equipment and Materials Network. Here, I am presenting a bit about the E450EDL – European 450mm Equipment demo line.
The aim of the ENIAC E450EDL key enabling technology pilot project is to continue the engagement of the European semiconductor equipment and materials industry in the 450mm wafer size transition that started with the ENIAC JU EEMI450 initiative and proceeded with subsequent projects funded with public money, amongst others NGC450, SOI450, EEM450PR.
The demo line resulting from this project will be such that it will enable first critical process module development by combining imec infrastructure with tools remaining at the site of the manufacturers (distributed pilot line). Multi-site processing will allow partners to participate in the world first 450mm integration studies and will be enabled by the controlled exchange of 450mm wafers between different sites.
The consortium comprises 41 members (from 11 different European countries) with many SMEs and research institutes. The project is organized in five technical work packages and a work package on management and co-ordination.
In the work package on integration and wafer processing first critical modules will be developed and will demonstrate the feasibility of processing on 450mm wafers. The main objective in the work package on lithography is to develop a wafer stage test-rig, which
can be implemented into the pilot line system. In the work package on front end equipment several tools will be developed such as a plasma ion implant module, a plasma dry etch module, a RTP system and a single wafer cleaning system.
Furthermore, in the dedicated work package on metrology 450mm metrology tool types will be developed for amongst others dielectric film thickness and composition measurements, defect inspection, defect review and analysis, optical critical dimensions (CD), overlay (mask and wafer) and 3D metrology.
Finally, from the work package on wafer handling and automation a set of equipment will be provided to support the demo line operations, and facilitate the R&D dedicated to process and metrology modules.
The project will last 36 months beginning on 1st of October 2013. The budget has been given at €204.6 million of which the ENIAC JU will fund €30.8 million. This project is still considering new members so if you are interested please contact ASML.
Here are highlights of the Union budget 2013-14 presented by P. Chidambaram, union Finance minister, Government of India. Also, is there finally, some hope for the Indian semiconductor industry?
* Doing business with India should be easy, friendly and helpful.
* Foreign investments must be encouraged.
* Accelerating growth is the main goal.
* Need to encourage FDI in consonance with economic priorities.
* To target $1 trillion in infrastructure in the 12th plan.
* There are incentives for semiconductor wafer fab manufacturing.
* There will be appropriate incentives for the semiconductors industry, including zero customs duty on plants and machineries.
* To increase allocation for science and atomic departments.
* Indian Institute of BioTechnology to be set up at Ranchi.
* Non-conventional wind energy sector needs help.
* Will encourage cities to take up waste-energy projects through PPPs.
* Plan being developed for Chennai-Bangalore industrial corridor.
* Preparatory work started for Bengalooru-Mumbai Industrial Corridor.
* To launch two new industrial cities in Gujarat and Maharashtra.
* Propose to continue with the Technology Upgradation funds scheme for the textile sector.
* India’s first women’s public sector bank to be set up.
* Woman’s bank license to be in place by October, 2013.
* All PSU banks branches to have ATMs by March, 2014.
* Zero customs duty for electrical plants and machinery proposed.
* Higher customs duty on set-top boxes.
* To provide more than Rs 4200 crore for medical studies.
* To allocate Rs 1106 crore for alternative medicine industry.
* To allocate 100 crores to AMU, BHU, TISS-Guwahati and INTACH.
* Government to set up National Institute of Sports Coaches in Patiala.
* To expand private FM radio to 294 cities.
* To auction 839 licenses for FM network to cover all India.
* Government to construct power transmission system from Srinagar to Leh at the cost of Rs 1,840 crore, Rs 226 crore provided in current budget.
* Mobile phones priced more than Rs. 2,000 will see duty raised by 6 percent.
* Extend tax benefit to electrical vehicles.
* A company investing Rs 100 crore or more in plant and machinery in April 1, 2013 to March 31, 2015 will be allowed 15 percent investment deduction allowance apart from depreciation.
* SEBI to simplify KYC norms governing foreign investors.
* SEBI will simplify procedures for entry of foreign portfolio investors to invest in India.
* Higher outlay on waste management.
* Government to monitor cost of doing business in India.
* Zero customs duty proposed for electrical plants and machinery.
* Proposal to provide Rs. 800 crore for the Ministry of New & Renewable Energy for generation-based incentive for wind energy projects as the non-conventional wind energy sector deserves incentives.
* Government will provide low interest bearing funds from the National Clean Energy Fund (NCEF) to IREDA to on-lend to viable renewable energy projects. The scheme will have a life span of five years.
* Proposal to set apart Rs. 2,000 crore and asked the National Innovation Council to formulate a scheme for the management and application of the fund.
Coming to semiconductors, the world today is discussing the viability of 450mm fabs. I am well aware that Malcolm Penn has been pushing for 450mm fabs across Europe. I believe that one such fab will cost in the excess of $25 billion, if not more. So, who will invest that kind of money in India? Do we have clean water and 24-hour electricity supply in any state that’s required for such a fab? What will this so-called 450mm fab manufacture? Does the fab have a blueprint in place? Well, have we even addressed any of these questions?
According to Malcolm Penn, CEO, Future Horizons, the outlook for the global semiconductor industry in 2013 is likely to be +7.9 percent. This means, the global semiconductor industry will likely grow to $315.4 billion in 2013.
Should this happen, it would be significant, given that this is the third year in a row that the market failed to break the $300 billion barrier! The global semiconductor clocked around $292.3 billion in 2012, as against $299.5 billion In 2011.
I asked Malcolm Penn the rationale behind this. He said, the rationale is exactly the same as that for 2012. There is said to be no change to last year’s fundamental market analyses. That’s not all! There are likely to be exactly the same (economic) downside risks as well.
The unit demand, capacity and ASPs are all ‘positively aligned’. Here, it is advised that one should never underestimate the economy’s capacity to derail the chip market. Even the downside forecast has been to break the $300 billion barrier.
The global chip industry growth is driven by four factors. These are economy, which is on hold due to complete loss of confidence, unit demand, which is back on the 10 percent per annum treadmill (inventory gone), fab capacity, which is currently tight (very), especially at the leading technology edge, and ASPs, which are structurally following the usual ups and downs.
There is a very safe, long-term bet, provided companies execute properly. As it is, most firms don’t, as they are too pre-occupied with chasing short-term targets.
Finally, if the year 2013 does show a recovery, the global semiconductor market will likely go ballistic in 2014.
Friends, it has been extremely difficult for me to stay away from my blog! ;) Not to speak of the thousands of requests! ;)
Well, I’ve been chatting up with Malcolm Penn, chairman and CEO, Future Horizons, lately, on the 450mm fab! In fact, at the IFS2012-MT mid-term semiconductor industry forecast seminar, he proclaimed that 450mm presented a unique opportunity for Europe!
First, 450mm will allow Europe’s indigenous chip firms to catch up their lost leadership position in advanced CMOS manufacturing, and place them at the forefront of technology in ‘More Moore’ (MM) and ‘More Than Moore’ (MtM). Embracing 450mm will ensure a clear migration path for all future silicon-based chip processing into the foreseeable future. Should Europe’s indigenous chip firms choose to ignore the 450mm paradigm shift, focusing instead on just MtM, and not MM, they will end up in a technology dead end!
Europe’s MtM expertise will get slowly cannibalised by more advanced technology-based firms looking to re-use their depreciated (n-1) MM platforms and shrinking remaining markets squeezed by ever-increasing over-crowding amongst their similar technology peers. Embracing MtM without MM will undermine Europe’s long-term KET aspirations and advanced manufacturing needs by 2025. By the way, a 450mm fab is already in TSMC’s roadmap!
The chip industry’s growth is driven by the economy, which is currently weak due to complete loss of confidence, as well as unit demand, fab capacity, which is very tight at the leading technology edge, and ASPs.
At IFS2012 in January, Future Horizons had said that +8 per cent is a safe bet for the global semiconductor industry. The updated outlook for 2012, from Future Horizons, for the global semiconductor industry is +4 per cent! As we all know, the chip fundamentals wait for no man or crisis! The year 2012 has been one of the unresolved Euro crisis. The chip market will likely rebound once business confidence returns!
As SEMI puts it: the key to the implementation of 450mm wafer production will be the ability of key subsystem and component suppliers to support leading tool makers with critical enabling products and technologies vital to 450 pilot lines and high volume production. The role of the the Global 450 Consortium (G450C) will be watched and followed with great interest.
The key question: Should Europe make a move for 450mm fabs? What happens to the existing 300mm fabs? Do let me know your thoughts, friends!
P.S.: By the way, what is the Indian semiconductor industry doing?
NXP Semiconductors N.V. has announced the first NWP ISO 11898-6 and AUTOSAR R3.2.1 compliant solution supporting CAN Partial Networking.
The stand-alone TJA1145 CAN transceiver and integrated system basis chip UJA1168 – the world’s first highly integrated solution to support CAN Partial Networking – give design engineers precision control over a vehicle’s bus communication network. By intelligently de-activating electronic control units (ECUs) that are currently not needed, engineers can significantly reduce vehicle fuel consumption and CO2 emissions without sacrificing performance or consumer experience.
Reducing CO2, improving energy efficiency
So, how will the NXP solution reduce CO2 and improve energy efficiency in vehicles? Karsten Penno, business development manager, Business Unit Automotive, NXP, said: “In current CAN networks, all ECUs are always active and consuming power when the vehicle is in use. This is the case even if the applications they control aren’t continuously required, such as seat positioning, sun roof operation, park assistance systems, etc.
“CAN Partial Networking changes this model by activating only those ECUs that are functionally required, while other ECUs remain in a low-power mode until needed. This results in significant savings in power/fuel consumption, reducing costs, wiring and CO2 emissions. CAN Partial Networking is also extremely beneficial for electric and hybrid vehicles as it helps extending their operating range and optimizing charging time. Saving potential: 0.11l fuel savings/100km and 2.6g CO2 reduction/km.”
Why not before?
Now, if the CAN Partial Networking solution is so novel, why wasn’t it thought of before?
Penno said: “Innovations like CAN Partial Networking always require a broad industry acceptance and standardization. The CAN bus system – as key component of in-vehicles networks – has been around for many years (introduced in early ’90s). However, only with the rising awareness on CO2 emissions and overall vehicle efficiency – along with growing CAN node counts – came the need for a more efficient CAN standard. NXP is innovation leader in this area and is chairs the standardizing working group within ISO.” Read more…