Flip-Chip is a chip packaging technique in which the active area of the chip is ‘flipped over’ facing downward, instead of facing up and bonded to the package leads with wires from the outside edges of the chip.
Any surface area of the Flip-Chip can be used for interconnection, which is typically done through metal bumps. These bumps are soldered onto the package and underfilled with epoxy. The Flip-Chip allows for a large number of interconnects with shorter distances than wire, which greatly reduces inductance.
According to Lionel Cadix, market and technology analyst, Yole Developpement, France, metal bumps can be made of solder (tin, tin-lead or lead-free alloys), copper, gold and copper-tin or Au-tin alloys. The package substrates are epoxy-based (organic substrates), ceramic based, copper based (leadframe substrates), and silicon or glass based.
In the period 2010-2018, Flip-Chip will likely grow at a CAGR of 19 percent. In 2012, laptop and desktop PCs were the top end products using Flip-Chip. It represents 50 percent of the Flip-Chip market by end product with more than 6.2 million of wafer starts. PCs are followed by smart TV and LCD TVs (for LCD drivers), smartphones and high performance computers.
The Flip-Chip market in 2012 is around $20 billion, selling 20 billion units approximately in 12’’ equivalent wafers. Taiwan is so far the no. 1 producer. At least 50 percent of the Flip-Chips devices get into end products. By 2018, the Flip-Chip market should grow to a $35 billion market, selling 68 billion units.
Applications and market focus
Looking at the applications and market focus, Flip-Chip technology is already present in a wide range of application, from high volumes/consumer applications, to low volumes/high end applications. All these applications have their own requirements, specifications and challenges!
Some of these are military and aerospace, medical devices, automobiles, HPC, servers, networks, base stations, etc, in low volumes. It is present in set-top boxes, game stations, smart TVs/displays, desktops/laptops and smartphones/tablets in high volumes. Flip-chip applications are also in imaging, logic 2D SoCs, HB-LEDs, RF, power, analog and mixed-signal, stacked memories, and logic 3D-SiP/SoCs.
In computing applications, for instance, the Intel core i5 is the first MCM combining a 77mm2 CPU together with a 115mm2 GPU in a 37.5mm side package. Solder bumps with a pitch of 185μm are used for the slicon to substrate (1st) interconnect. This MCM configuration is suitable for office applications, with relatively low demanding processing powers. For mobile/wireless applications, there are opportunities for MEMS in smartphones/feature phones. Similarly, Flip-Chip is available for consumer applications.
For microbumping in interposers for FPGA there is a focus on Xilinx Virtex 7 HT. Last year, Xilinx announced a single-layer, multi-chip silicon interposer for its 28nm 7 series FPGAs. Key features include two million logic cells for a high level of computational performance, and high bandwidth, four slice processed in 28 nm, 25 x 31mm, 100 μm thick silicon interposer, 45 um pitch microbumps and 10 μm TSV, and 35 x 35 mm BGA with 180 μm pitch C4 bumps.
Even if the infrastructure had been ready for full 3D stacking, the 2.5D Interposer would still have been the right choice for FPGAs since the ’10,000 routing connections’ would have used up valuable chip area, making the chip slices larger and more costly than they are now. Virtex 7 HT will consist of three FPGA slices and two 28 gbps SerDes chips on an Interposer capable of operating at 2.8 Tb/sec.
Freescale and Bosch, the two automotive leaders, are jointly enabling emerging markets with reference platforms.
Freescale has a strong presence in automotive, offering MCUs and MPUs, sensors and analog. It also has a comprehensive software enablement. Bosch also has a strong presence in semiconductors and sensors, offering airbag systems, vehicle dynamics systems, engine management systems, transmission control systems, electric power steering, electric drives control, alternator electronics and IP.
The two companies have jointly introduced the airbag reference platform in India, on the sidelines of the Freescale Technology Forum 2011. It is said to be everything that you need to add your crash algorithm and make it your airbag solution.
Both the companies are leveraging their global leadership positions and system expertise to provide customers with automotive reference platforms specifically designed for emerging markets.
Airbags are ranked among the most efficient life saving passive safety applications. There is an increasing demand for mobility in emerging markets. That makes airbags necessary for reducing injuries and fatalities. Freescale and Bosch, the two global automotive leaders, are working in partnership to enable emerging market customers to provide greater occupant safety through these airbag reference platforms.
The proven design helps accelerate time to market, is affordable and scalable, based on the latest generation technology, and meets the latest automotive quality standards. It has the complete bill of materials with jointly developed firmware.
Freescale Qorivva MPC560xP MCU family
* Scalable MCU family for safety applications.
* e200z0 Power Architecture core @ 64 MHz.
* Scalable memory, up to 512 KB Flash.
* LQFP package.
Bosch CG1xx Airbag ASSP family
* Scalable airbag ASSP family.
* Power supply for complete ECU.
* Up to four satellite sensor interfaces (PSI5).
* Up to 12 firing loops integrated.
* Up to six analog interfaces.
* Safing block + Watchdog.
• Works with Sensors from Freescale and Bosch.
Customer benefits include Safing concept proven with Freescale and Bosch sensors. There is a faster time to market using airbag system evaluation software. Some other benefits include ECU level debug and test over serial communications interfaces, fully supported application level debug and test using MCU ecosystem, and a friendly GUI.
Lattice Semiconductor Corp. has introduced the Platform Manager family — its third-generation mixed-signal devices.
Lattice’s Platform Manager product family consists of two devices — the LPTM10-1247 and the LPTM10-12107, respectively. The LPTM10-1247 device monitors 12 voltage rails and supports 47 digital I/Os. The LPTM10-12107 device monitors up to 12 voltage rails and supports 107 digital I/Os.
The programmable devices will simplify board management design significantly by integrating programmable analog and logic to support many common functions, such as power management, digital housekeeping and glue logic.
By integrating these support functions, Platform Manager devices reduce the cost of these functions compared to traditional approaches, and improves system reliability. It provides a high degree of design flexibility that minimizes the risk of circuit board re-spins.
More to follow.
Last week at the Hitachi Information Forum event, Hitachi Data Systems Corp. (HDS) introduced the Hitachi Virtual Storage Platform (VSP) — said to be the industry’s first three-dimensional (3D) scaling platform. These claim to enable organizations to scale up, out and deep for unprecedented levels of agility and cost savings in their virtualized data centers.
The VSP, along with the Hitachi Command Suite management software, offers best-in-class performance, capacity and open, multivendor storage virtualization for large businesses and enterprise organizations.
The event was graced by Randy DeMont, executive VP, Worldwide Sales, Services and Support and Phil Gann, director, Solutions, Products and Services, APAC, who discussed the VSP, along with Kevin Eggleston, senior VP and GM, APAC and Vivekanand Venugopal, VP and GM, India, Hitachi Data Systems.
More details later.
Last week, Cadence Design Systems Inc. introduced the Virtuoso IC6.1.4 — with dramatic improvements to the Virtuoso IC design platform — that reduces overall design time and ensures high-quality production ICs.
These enhancements are said to benefit design teams working along the full spectrum of design complexity, from the most advanced-node, cutting-edge designs to more traditional chips.
This release has been extended to work efficiently at advanced nodes down to 28 nanometers and now supports 64-bit processing for improved capacity and performance. The Virtuoso Space-Based Router has been integrated into the Virtuoso Layout Suite cockpit, making it easier to access.
I got into a conversation with Steven Lewis, marketing director, Cadence, to find out more about this release.
Lewis said: “Virtuoso IC61 was first shipped in October, 2006, over three years ago. IC614 is the latest release of this platform. IC61 is based on OpenAccess as a database with a Qt based GUI. Also, in IC61 a common design constraint system is key to design spanning schematics, layout, routing, circuit optimization, and all other Virtuoso applications.”
The IC 614 has a number of significant areas of enhancements. These include:
1) Significant improvements to analog design environment — A number of key enhancements have gone into ADE to make it even easier to use and to improve performance. Areas like: data presentation, multi-testbench support, analysis and signoff quality validation, data sheet generation, simulation results comparisons, and intelligent selection of sensitivity to statistical variations to dramatically reduce the number of simulations needed.
2) Native integration of the Catena interconnect engine — This enables integration of the Cadence Space-based Router into VLS-GXL, including the common design-constraint system, runtime OA database and OA techfile for design rules. In addition, the Wire Editor, which is based on this technology, is available to every VLS XL Layout Designer.
3) Metric-Driven Productivity — IC 6.1.4 is all about productivity, productivity, productivity. Many users of VLS spend six to eight hours a day in front of this cockpit and incremental improvements have a significant cumulative effect. IC 6.1.4 will:
* Reduce the mouse miles that a layout designer sees.
* Reduce the mouse clicks required for an operation.
* Reduce the menu depth for an operation.
And, how will the IC6.1.4 gain capacity, performance and usability boosts to shrink design cycles?
According to Lewis, there are a number of enhancements to frequently used features, like a new Layer Palette, improved Repeat Copy, enhancements to Via Placement, a new Smart Ruler, and PCell Caching. Additionally, there are improvements to the connectivity, constraint-aware editing and verification, and capacity with the 64-bit port. Read more…
Xilinx recently announced six new development kits as part of its Targeted Design Platforms (see July 2009 archive).
These kits will enable developers to focus on innovation and differentiation, while designing with FPGAs. The development platforms for Virtex-6 and Spartan-6 FPGA families are said to significantly shorten the time taken to reach optimal levels of system performance, while ensuring lower levels of power consumption during SoC development.
High development costs are driving ASSPs to ultra high volume markets. There is also a growing ASIC/ASSP application gap. Vamsi Boppana, senior director and CTO, Xilinx India, said that new FPGA powered application needs on the horizon include communications, smart grid, automotive infotainment, green IT surveillance, cloud computing, intelligent video, security infrastructure, etc.
Neeraj Varma, country manager, sales, India, Australia and New Zealand, Xilinx India, added that the kits are targeting embedded, DSP and building of systems requiring high-speed serial connectivity by providing design teams with optimized tool suites tuned to their design flow, fully functional IP and Targeted Reference Designs common to their areas of expertise.
In the Virtex-6 series, Xilinx is offering the connectivity kit, the embedded kit, both of whom are available, and the DSP kit — which will be released in January 2010. In the Spartan-6 series, it is offering the connectivity kit, the embedded kit, both of whom are available, and the DSP kit — which will be released in March 2010.
The kits support development of designs with Virtex-6 series FPGA family for compute intensive, high-speed, high-density SoC applications, or the Spartan-6 FPGA family for applications where size, power and cost are key considerations, besides performance.
Each kit is supported by an edition of the ISE Design Suite v11.4 (see April 2009 archive), which delivers a 25 percent runtime reduction for Spartan-6 FPGA designs and a 30 percent runtime reduction large, complex and highly utilized Vetex-6 SoC designs over the previous release.
Boppana added that the anatomy of a domain-specific kit includes:
* Scalable development board
– Enable migration up or down in same FPGA package,
– FMC connectors – extend base board functionality, enables ecosystem,
– Pre-configured with working Targeted Reference Design.
* Domain optimized design environment
– ISE Design Suite
> Hardware development flow supporting RTL or block level abstraction
> Embedded software development flow
> Advanced connectivity setup and analysis tools
* Targeted Reference Designs
– Optimized for system performance, power savings, and cost
– Enables system evaluation, performance measurement and analysis
* Complete documentation, source code, and IP cores
Targeted applications for the embedded design kits include wireless baseband and radio, image processing, processor acceleration for Virtex-6 and industrial control/security, automotive control, consumer for Spartan-6.
Boppana also touched upon the case study of one of Xilinx’s customers — Tata Elxsi. Using the pre-verified MicroBlaze processor sub-system with DDR3 memory controller and Gigabit Ethernet, Tata Elxsi was able to get the software up and running on the SP605 board within a few hours. It was also able to witness over 50 percent performance improvement compared to previous generation design.
Target applications for the connectivity design kits include wired communications, video switches, routers, etc. for Virtex-6 and Ethernet routers, industrial control hubs, storage, etc., for Spartan-6.
Target applications for the DSP design kits include wireless radio, radar, medical MRI/CT/PET equipment, image recognition, etc., for Virtex-6 and femto/pico cell communications, consumer video, industrial camera, etc., for Spartan-6.
Hence, engineering teams can now finish their designs faster and focus on differentiation. The kits include all the hardware and software that designers need. This includes fully tested/supported Targeted Reference Designs.
Top 5 high growth markets driving (semicon?) recovery, and top 10 hot and emerging technology platforms
Today, I received two wonderful reports — one, highlighting the top 5 high growth markets driving (semiconductor) recovery, and two, the top 10 hot and emerging technology platforms well poised to profoundly impact manifold sectors across the globe while offering potential high RoI for investors!
First, semiconductors! Semico Research has come up with a report that highlights the top 5 high growth segments driving growth and recovery in the semiconductor segment. For the record, 2009 is likely to see the global semiconductor industry decline by 12.5 percent. The top 5 segments according to Semico Research are:
* Portable navigation devices (PNDs)
* Digital TVs
* DVD recorders
* Video game consoles
Hey, there really seems to be a lot of light at the end of the tunnel for the consumer electronics industry!
On netbooks, I think Intel needs to be given most, if not, all of the credit. Here’s what iSuppli has to say in its fast facts for Intel’s Q3 results:
* Intel also capitalized on the continued rise in demand for netbook PCs. The company dominates the netbook microprocessor market with its Atom chip. iSuppli predicts global netbook shipments will rise to 22.2 million units in 2009, up 68.5 percent from 13.2 million in 2008.
* While Atom represents only a small share of Intel’s total revenue, its profitability is disproportionately high. “Netbook microprocessors are a high-margin product because they utlilize old technology,” said Matthew Wilkins, principal analyst, compute platforms, for iSuppli. “The Atom is based on the old Pentium M microprocessor and uses a mature manufacturing process. Because of this, Intel is getting very high yields and an extremely high margin on the Atom.”
On PNDs, SatNav has recently introduced a Bluetooth enabled multifunction PND. Also, In-Stat reports that the worldwide unit shipments for PNDs will reach approximately 56 million units in 2012.
However, iSuppli has just sent out a story to me, saying that PNDs have now entered a period of slowing growth, spurring companies throughout the supply chain to re-evaluate their business models. Interesting!
As for digital TVs, according to DisplaySearch, developed markets are starting 2009 with strong growth and emerging markets are transitioning from CRT to LCD TVs faster than expected. However, plasma (PDP) TV is expected to fall about 2 percent Y/Y to 14.1 million in 2009 after strong 28 percent growth in 2008. As per iSuppli, OLED-TV revenue will likely rise by a factor of 240 by 2015—but still remain a niche. Let’s see!
DisplaySearch’s total global TV forecast is 200.4 million units in 2009, down 3 percent Y/Y, the first decline in total shipments in recent memory as the global recession and rising unemployment continue to take a toll on demand. However, the slowdown will be temporary as the worldwide economy emerges from recession and new markets enter the initial stages of the flat panel and digital TV transition.
Among DVDs, Samsung has introduced its first internal Blu-ray disc combo drive with BD-R and 8X BD-ROM read speed. Also, Flex-DVD is the latest technology in the DVD replication industry. This single layer format has the same capacity of a DVD-5 (4.7GB for standard size and 1.1GB for 3″ Mini DVD), but is half the thickness of the standard DVD.
Video game consoles — I find it quite interesting! It has been reported that the only products to see a decline in unit shipments in the second quarter were handheld video games, video game consoles, etc. Watch this market segment!
Now, to the top 10 hot and emerging technologies! According to a report from Frost & Sullivan, these are:
* Flexible electronics
* Advanced batteries and energy storage
* Smart materials
* Green IT
* CIGS solar
* 3D integration
* Autonomous systems
* White biotech
Flex-DVD, above, is a great example of flexible electronics. Green IT — although a much abused term, it has certainly been on the top of the charts for quite some time now. Battery technologies and energy storage — yes, certainly. There are rightful places for CIGS solar — a point also made by Dr. Robert Castellano of The Information Network — and smart materials, as well as lasers and white biotech.
Well, what do you think folks? Do you agree with these top 5 and top 10 lists?
Last week, Xilinx discussed its Targeted Design Platforms, aimed at accelerating the development of system-on-chip (SoC) solutions with Xilinx Virtex-6 and Spartan-6 FPGAs.
I was in conversation with Brent Przybus, Director of Product Marketing, as well as Neeraj Varma, Country Manager, Sales, for India and Australia and New Zealand.
First up, the ISE Design Suite 11.2 is now available for download, with full public support for Virtex-6 and Spartan-6 FPGA families. Xilinx also introduced the Spartan-6 and Virtex-6 base evaluation kits, which can be order immediately by customers.
Since this is the ISE Design Suite 11.2, Przybus added that prior to June 24, support for the Virtex-6 and Spartan-6 FPGA families was available only to early access customers.
Accelerating development of SoC solutions
Next, the Base Targeted Design Platform is said to accelerate the development of SoC solutions. According to Przybus, the Base Targeted Design Platform provides a framework that customers can extend to build their SoC solutions.
“We are providing the common functions including host interface and external memory controller as well as multi-boot in a system configuration. Customers can leverage this code saving weeks of months of development.”
The obvious question, why this release now, and not earlier? According to Varma: “Xilinx has always had boards, silicon, tools, IP and reference designs. However, with changes in market conditions and customer needs evolving, what became abundantly clear in recent years is that we need a more formalized and efficient way of providing a base for customers to build upon. Customers have also been asking for more complete design solutions.”
The concept for Base Targeted Design Platform was introduced in February when Xilinx had announced the architectural details of Spartan-6 and Virtex-6 FPGA devices along with the entire targeted design platform strategy.
“When the announcement was made, we had early access customers designing with Spartan-6 and Virtex-6 FPGAs. With the release of the ISE Design Suite 11.2, we are opening up public access to the two new device families. By doing so, we are opening up access through software of all our new devices, we are also making technical documentation, user guides and other resources available to all customers,” he added.
The release of the Base Targeted Design Platform is coincidental to the public availability of software supporting both Virtex-6 and Spartan-6 FPGAs.
The new Virtex-6 FPGA and Spartan-6 FPGA Evaluation Kits are the first in a series of kits that Xilinx will offer throughout the year designed to simplify the evaluation and development of SoCs with the latest generation of programmable technologies from Xilinx.
Now that the first kits have been released, let us probe into Xilinx’s plan for evaluation kits that it will offer throughout the year.
Varma added: “According to our Targeted Design Platform strategy, we have introduced the first level of our offerings. Moving forward, throughout the year we will introduce the Domain Specific Platform and then the Market Specific Platform. The Domain Kits will incorporate embedded kits, connectivity kits, and finally the DSP kits for both Virtex-6 and Spartan-6.” This point should be noted with great care by designers as lots more is in the offing from Xilinx.
The Market Specific Platform will address specific markets and include Communication, Video and Broadcast Kits, Market specific IP, custom tools and custom boards, added Varma.
Spartan-6 SP601 evaluation kit
Xilinx also introduced the Spartan-6 SP601 evaluation kit. Brent Przybus highlighted that the Spartan-6 SP601 evaluation kit is designed to address customers developing high volume, lower cost applications.
He elaborated: “The kit features the Spartan-6 LX16 FPGA and ships with a full base reference design and interface software providing customers a host communications link, built-in memory controller core that interfaces to DDR2 DRAM on the SP601 board, support for multi-boot, and a processing block that enables customers to see and measure the benefits of using a hard IP vs. Logic only simple processing function.
Addressing defense, aerospace apps
How useful will be all of this for defense and aerospace applications? According to Neeraj Varma, a lot of aerospace and defense applications require high performance digital signal processing (DSP), for example, in their video processing, secure communications, wireless communications (software defined radio or SDR), etc.
“Using the Base Targeted Design PLtatform as shown in the demonstration video, designers will be able to evaluate tradeoffs in performance, precision, and power consumption using hard DSP slices available in Spartan-6 and Virtex-6 FPGAs,” he said.
Using the DSP slices in Spartan-6 will help designers boost their performance by five times with higher precision without resulting into the increase of overall power consumption.
Varma added: “The Base Targeted Platform that we have announced will help our customers tune their applications not only in the aerospace and defence applications, but can be used for other applications in different vertical markets as well. Through this year, we will introduce Domain Specific Kits followed by Market Specific Kits. The Market Specific Platform will further address the specific defense applications in future.”
Lastly, there has been a lot of focus on design re-engineering and design security.
Przybus pointed out that the specific reference design shown in the Xilinx demo video has been done in HDL and doesn’t include and design security.
“The base reference design is portable and can be extended in a number of ways. The customer could use the built-in features like DeviceDNA, AES encryption of bitstream, etc. in our Virtex-6 and Spartan-6 silicon to secure their designs,” he noted.