STMicroelectronics has unveiled its roadmap for ARM Cortex-M4 and -M0 with products sampling from mid 2011 onward and production by end of 2011. It has also unleashed the full performance of the Cortex-M3 with its latest STM32 F-2 series.
According to Vinay Thapliyal, technical marketing manager, MCU, STMicroelectronics, India, there are over 30 new part numbers, pin-to-pin and software compatible with existing STM32 devices.
He said: “Today, we already have 110 parts running for the F-1 series, which is currently existing and in full production. Now, we are extending the family. This time, we have launched the F-2 family — the highest performance family — to unleash the ultimate performance of Cortex-M3.” Naturally, the F-2 series is benefiting the existing F-1 devices.
As mentioned, 30 new devices will be launched. They are already ramping now. “All of these belong to the high-performance, low-power family. We will also be revealing our roadmap for M4 and M0 — to be in production by end of 2011, with sampling by middle of 2011.”
ST’s F-2 series will further enhance real time preformance. Thapliyal added that ST has built in ART accelerator into these devices. This will deliver 150 DMIPS (Dhrystone MIPS) at 120MHz.
The adaptive real-time memory accelerator unleashes the Cortex-M3 core’s maximum processing performance equivalent to 0-wait state execution Flash up to 120 MHz.
The ART accelerator is a pre-fetch queue and branch cache mechanism that stores the first instructions and constants of the branches, interrupt and subroutine calls. The penalty occurs the first time those events occur like for any pipelining mechanism.
After that, the instructions stored in cache are pushed immediately in the pref-etch queue upon recognition of a stored branch address. In addition, the embedded Flash is organized in 128-bit rows, allowing up to 8 (16-bit) instructions to be read per access. Read more…
On the growth drivers for GP MCUs, the market growth is driven by faster migration to 32 bit platform. ST has been the first to bring the ARM Cortex based solution, and now targets leadership position on 32bit MCUs. An overview of the STM32 portfolio indicates high-performance MCUs with DSP and FPU up to 608 CoreMark and up to180 MHz/225 DMIPS.
Features of the STM32F4 product lines, specifically, the STM32F429/439, include 180 MHz, 1 to 2-MB Flash and 256-KB SRAM. The low end STM32F401 has features such as 84 MHz, 128-KB to 256-KB Flash and 64-KB SRAM.
The STM32F401 provides thebest balance in performance, power consumption, integration and cost. The STM32F429/439 is providing more resources, more performance and more features. There is close pin-to-pin and software compatibility within the STM32F4
series and STM32 platform.
The STM32 F429-F439 high-performance MCUs with DSP and FPU are:
• World’s highest performance Cortex-M MCU executing from Embedded Flash, Cortex-M4 core with FPU up to 180 MHz/225 DMIPS.
• High integration thanks to ST 90nm process (same platform as F2 serie): up to 2MB Flash/256kB SRAM.
• Advanced connectivity USB OTG, Ethernet, CAN, SDRAM interface, LCD TFT controller.
• Power efficiency, thanks to ST90nm process and voltage scaling.
In terms of providing more performance, the STM32F4 provides up to 180 MHz/225 DMIPS with ART Accelerator, up to 608 CoreMark result, and ARM Cortex-M4 with floating-point unit (FPU).
The STM32F427/429 highlights include:
• 180 MHz/225 DMIPS.
• Dual bank Flash (in both 1-MB and 2-MB), 256kB SRAM.
• SDRAM Interface (up to 32-bit).
• LCD-TFT controller supporting up to SVGA (800×600).
• Better graphic with ST Chrom-ART Accelerator:
– x2 more performance vs. CPU alone
– Offloads the CPU for graphical data generation
* Raw data copy
* Pixel format conversion
* Image blending (image mixing with some transparency).
• 100 μA typ. in Stop mode.
Some real-life examples of the STM32F4 include the smart watch, where it is the main application controller or sensor hub, the smartphone, tablets and monitors, where it is the sensor hub for MEMS and optical touch, and the industrial/home automation panel, where it is the main application controller. These can also be used in Wi-Fi modules for the Internet of Things (IoT), such as appliances, door cameras, home thermostats, etc.
These offer outstanding dynamic power consumption thanks to ST 90nm process, as well as low leakage current made possible by advanced design technics and architecture (voltage scaling). ST is making a large offering of evaluation boards and Discovery kits. The STM32F4 is also offering new firmware libraries. SEGGER and ST signed an agreement around the emWin graphical stack. The solution is called STemWin.
Flip-Chip is a chip packaging technique in which the active area of the chip is ‘flipped over’ facing downward, instead of facing up and bonded to the package leads with wires from the outside edges of the chip.
Any surface area of the Flip-Chip can be used for interconnection, which is typically done through metal bumps. These bumps are soldered onto the package and underfilled with epoxy. The Flip-Chip allows for a large number of interconnects with shorter distances than wire, which greatly reduces inductance.
According to Lionel Cadix, market and technology analyst, Yole Developpement, France, metal bumps can be made of solder (tin, tin-lead or lead-free alloys), copper, gold and copper-tin or Au-tin alloys. The package substrates are epoxy-based (organic substrates), ceramic based, copper based (leadframe substrates), and silicon or glass based.
In the period 2010-2018, Flip-Chip will likely grow at a CAGR of 19 percent. In 2012, laptop and desktop PCs were the top end products using Flip-Chip. It represents 50 percent of the Flip-Chip market by end product with more than 6.2 million of wafer starts. PCs are followed by smart TV and LCD TVs (for LCD drivers), smartphones and high performance computers.
The Flip-Chip market in 2012 is around $20 billion, selling 20 billion units approximately in 12’’ equivalent wafers. Taiwan is so far the no. 1 producer. At least 50 percent of the Flip-Chips devices get into end products. By 2018, the Flip-Chip market should grow to a $35 billion market, selling 68 billion units.
Applications and market focus
Looking at the applications and market focus, Flip-Chip technology is already present in a wide range of application, from high volumes/consumer applications, to low volumes/high end applications. All these applications have their own requirements, specifications and challenges!
Some of these are military and aerospace, medical devices, automobiles, HPC, servers, networks, base stations, etc, in low volumes. It is present in set-top boxes, game stations, smart TVs/displays, desktops/laptops and smartphones/tablets in high volumes. Flip-chip applications are also in imaging, logic 2D SoCs, HB-LEDs, RF, power, analog and mixed-signal, stacked memories, and logic 3D-SiP/SoCs.
In computing applications, for instance, the Intel core i5 is the first MCM combining a 77mm2 CPU together with a 115mm2 GPU in a 37.5mm side package. Solder bumps with a pitch of 185μm are used for the slicon to substrate (1st) interconnect. This MCM configuration is suitable for office applications, with relatively low demanding processing powers. For mobile/wireless applications, there are opportunities for MEMS in smartphones/feature phones. Similarly, Flip-Chip is available for consumer applications.
For microbumping in interposers for FPGA there is a focus on Xilinx Virtex 7 HT. Last year, Xilinx announced a single-layer, multi-chip silicon interposer for its 28nm 7 series FPGAs. Key features include two million logic cells for a high level of computational performance, and high bandwidth, four slice processed in 28 nm, 25 x 31mm, 100 μm thick silicon interposer, 45 um pitch microbumps and 10 μm TSV, and 35 x 35 mm BGA with 180 μm pitch C4 bumps.
Even if the infrastructure had been ready for full 3D stacking, the 2.5D Interposer would still have been the right choice for FPGAs since the ’10,000 routing connections’ would have used up valuable chip area, making the chip slices larger and more costly than they are now. Virtex 7 HT will consist of three FPGA slices and two 28 gbps SerDes chips on an Interposer capable of operating at 2.8 Tb/sec.
France’s Yole Développement, recently organized a seminar on PV inverter – technical innovations and market trends. The speakers were Brice Legouic, Power Electronics Market & Technology Analyst, Yole and Paul Kleistead, Cree.
What are the trends for 2011-12? According to Legouic, a first step of standardization should take place at the added functionalities level. This includes MPP positioning with advanced solutions, monitoring, and anti-theft and protection. Two, players with a higher level of product quality will enter the EU market. These include Japanese players focusing on efficiency and reliability, but with more expensive inverters.
Yole also anticipates a double speed business to take place. If the residential segment is opened to Chinese manufacturers and industrial/solar farms are dedicated to high-end products, the PV inverter market would become two different markets.
Speaking about market trends, he said that trends will be driven by reduction of feed-in tariff, which hurries the end users to sign contracts. Over 2 million are likely to be sold in 2012. The total market in 2010 was slightly below €3.3 billion, and will overpass €3.5 billion by 2012.
Over 75 percent of the market is owned by the top 10 PV inverter players. Five of these are German, eight are European, and two are American. Eighty percent of EU inverters are made in Europe and 20 percent are made in the USA. Asian players will likely increase their supply for the EU market. Japanese players currently have very small implantation in the EU. Yole believes that their market share could reach 15 percent within the next three years.
On technological trends, Legouic touched upon the neutral-point-clamped (NPC) architecture. The NPC architecture uses diode to clamp the DC bus voltage in two equal voltages. The benefits are:
* allowing the use of lower 600V devices instead of 1200V,
* reducing dynamic losses, and
* SJ MOS can be used for outer switches for their higher frequency performances.
The NPC architecture is nearly always used for 10-50kW inverters.
Using the SiC free-wheeling diode can increase efficiency from up to 2 percent. More and more are used for low- to medium-power range. Benefits include much better recovery time and reduction in IGBT switching losses. On the DC/DC stage component chart, he added that according to STMicroelectronics, we can assume that when the maximum input voltage of an inverter is below 650V, the DC/DC stage is MOSFET-based. Over 650V, the inverter can be considered to be built with a 1200V IGBT.
As for implementation of new technologies, such as SiC vs. GaN, 900-1200V will be the targeted range for over 10kW inverters. SiC diodes are already implemented in residential and commercial inverters. In 2012, silicon will represent more than 90 percent of the modules market, and about 75 percent of the wafer market. SiC will be mostly driven by diodes. Components will be at an early stage of adoption. Read more…
Yole Developpement of France recently organized a seminar on next generation MEMS. The speakers were Dr. Eric Mounier, project manager, Yole Développement, and Dr. Adrian Devasahayam, senior director, Technology, Veeco Instruments.
As performance requirements for MEMS and other devices become more stringent, the industry is encountering etch challenges that cannot be overcome with existing toolsets. The use of materials that are not readily etched reactively, combined with higher sensitivities to post etch corrosion in smaller devices, is driving a search for a more suitable etch solution for certain applications.
According to Dr. Mounier, Yole, it is estimated that until 2015, the ferroelectric thin film business will grow at rate of +7.5 percent per year with many current or new applications. In the MEMS field, these applications could be wafer level autofocus, IR sensors, RF switches, medical ultrasonic transducers. In other markets, applications would include IPD tunable capacitor, IPD hearing aids, FeRAM, optical switches, etc.
Dr. Mounier added that the ferroelectric thin films global market growth is mainly driven by two high growth rate MEMS applications until 2015, namely, IR sensors and wafer level optic autofocus. He added that many other applications are expected to emerge in 2014-2015. These would include RFMEMS and ultrasonic thin film technologies that are under development by large groups, such as IBM, Philips, Toshiba, etc. IPD high density planar capacitors with thin films are being evaluated all over the world by key companies, such as STMicroelectronics, Ipdia, On Semi, Maxim, etc.
Magnetometers using MEMS technologies are currently under development, such as at Bosch, VTT, etc.. They are likely to be integrated with accelerometers to create inertial sensing modules (combo sensors) for consumer/auto applications. Read more…
STMicroelectronics has launched the STM32 F4 series of microcontrollers (MCUs), based on the latest ARM Cortex-M4 core. This adds to the signal-processing capabilities and faster operations to the portfolio of STM32 MCUs.
The STM32 F4 series brings the world’s highest performance Cortex-M microcontrollers at 168 MHz FCPU/210 DMIPS and 363 Coremark score.
Vinay Thapliyal, technical marketing manager-India, Microcontroller Division, Greater China and South Asia region, STMicroelectronics Marketing Pvt Ltd, said that the series extends the ST’M32 portfolio of 250+ compatible devices already in production, including the F1 series, F2 series and ultra-low-power L1 series, respectively. ST is said to have 45 percent of the market share by units.
The STM32 F4 series of MCUs are re-inforced on five pillars:
* Real-time performance — 168MHz/210 DMIPS.
* Outstanding power efficiency.
* Superior and innovative peripherals.
* Maximum integration – 1Mbyte Flash, 192 Kbyte SRAM.
* Extensive tools and hardware — CMSIS DSP library, Matlab support, various IDE starter kits, RTOS and stacks.
A Coremark study says that STM32 F4 gives the best acceleration and highest speed. Thapliyal added, “We are ready for the market.” It takes ART to be #1 in performance: It is a combination of core, embedded Flash design, process, acceleration techniques, etc.
ST’s ART Accelerator, an adaptive real-time memory unleashes the Cortex M4 core’s maximum processing performance equal to 0-wait state execution, and Flash upto 168MHz. Real-time performance is the 32-bit multi AHB bus matrix. The layers are independent of each other.
The STM32 F4 series boasts a high-performance digital signal controller. The MCU leads to the ease of use of C programming, interrupt handling and ultra-low power. The FPU facilitates single precision, ease of use, better code efficiency, faster time to market, eliminates scaling and saturation, and easier support for meta-language tools. The DSP is based on Harvard architecture, single-cycle MAC and barrel shifter.
It also boasts of an outstanding power efficiency. The 230 μA/MHz, 38.6 mA at 168 MHz executing Coremark benchmark from Flash memory (with peripherals off), has been made possible with:
* ST’s 90nm process allowing the CPU core to run at only 1.2 V.
* ART Accelerator reducing the number of accesses to Flash.
* Voltage scaling to optimize performance/power consumption.
* VDD min down to 1.7 V.
* Low-power modes with backup SRAM and RTC support.
The low power in real-life applications is not just low-power mode. There is also a need to consider the percentage of time spend in low-power (LP) mode and in Run mode. If competitors are claiming better low-power modes, these are only an advantage if the overall system is spending more than 90 percent of the time doing nothing in low-power mode.
Superior and innovative peripherals includes, among others, two USB OTGs, two full duplexes PWMs at 168MHz, ADC at 2.4MSPS.
As for maximum integration, the 1-Mbyte Flash and 192-Kbyte SRAM memories available in the product accommodate advanced software stacks and user data, with no need for external memories. The 4-Kbyte SRAM battery back-up is used to save the application state and calibration data (SRAM block used as an EEPROM). In addition, the 528 bytes of OTP memory make it possible to store critical user data, such as the Ethernet MAC addresses or cryptographic keys. Read more…
I am back in New Delhi, covering the electronica/productronica 2011 show! This is my second time at the show, however, the first time in New Delhi, as the previous year’s edition was held in Bangalore.
Is there anything new that I see? Perhaps, not as yet! However, I shall reserve comment till I visit the show.
What I do notice is more or less a similar, or familiar set of names of exhibitors, if the one put up by the organizers on their website is correct. Maybe, there are a few additions, but that’s all I can say, for now!
STMicroelectronics seems to have become a new addition, as is Renesas Electronics Singapore Pte Ltd. One other addition seems to be SiPlace, Of course, the show is graced by familiar names, such as Bergen Associates, element14, EMST Marketing, Inde Enterprises, Juki India, Leaptech, Murata, NMTronics, NXP, QUAD Electronics, Rohde & Schwarz, RS Components, Sumitron and so on!
There is one other difference! Most of these firms are multinational companies (MNCs) or arms of the MNCs. While I don’t have anything against them, one is tempted to ask the question: where are the Indian companies? Specifically, where are the ‘so-called’ Indian electronics manufacturing companies?
We all love to talk about how India should play a major role in electronics manufacturing. However, seriously, how much of this is actually happening in India? More precisely, where are the home grown Indian manufacturing units?
I noticed that one of the sessions is going to be a panel discussion titled: Local mobile phone manufacturing: Opportunity or challenge!! Wonder, what will come out of the session! There’s another on EMS – where, again, the weight lies with the MNCs. Of course, there are two speakers — N. Jehangir from SFO and Raminder Singh from QUAD, in the final session. The other session on automotive electronics also seems to be loaded with speakers from MNCs.
Can India really get to become a global hub for EMS? Well, let’s just wait and see what exactly do these august gentlemen in the two panel discussions have to say!
It is a such a pleasure interacting with Vivek Sharma, VP, Greater China & South Asia-India Operations, and director, India Design Centers, STMicroelectronics. While presenting the latest trends in embedded technologies, he hoped that there could eventually be a fab in India, by 2015. Speaking about ‘More Moore’ and ‘More than Moore’, he talked about 3D heterogeneous integration and smart sensors – that provide new, high-growth opportunities. Sharma largely touched upon smart and green energy.
India’s opportunities to leapfrog are immense, especially with a median age of 25.9 years. As for the Indian consumption context, India’s share is ~3 percent worldwide consumption levels 2009/2010. It is said to be $45 billion or ~3 percent in electronics and $6.7 billion or ~2.5 percent in semiconductor consumption.
Taking a look at leveraging of electronics by nations, (as per 2005 data) Taiwan leads with 15.5 percent of GDP, followed by South Korea at 15.1 percent, China at 12.7 percent, Thailand at 12.4 percent, Germany at 8.3 percent, USA at 5.4 percent, Japan at 4.5 percent, and India at 1.7 percent, respectively.
“More than Moore” diversification has been taking place, especially, by combining SoC and SIP to produce higher value systems.
3D heterogeneous integration has been taking place by integrating multiple functions via 3D/TSV. This involves the vertical stacking and connection of various materials, technologies and functional components together:
* Bio, MEMS and other sensors.
* Digital processing (MCUs, MPUs).
* RF transceivers for data transmission.
* Micro-battery (i.e., thin film).
* Other analog ICs and mixed technologies.
Advantages include integrated multi-functionality, more interconnections, reduced power consumption, smaller packaging, increased yield and reliability, and reduced overall costs.
Smart system integration is another trend, which enables combining “More than Moore” and “More Moore” technologies in a single smart system — from multi-package on board to multi-chip on package.