Agnisys Inc. was established in 2007 in Massachusetts, USA, with a mission to deliver innovative automation to the semiconductor industry. The company offers affordable VLSI design and verification tools for SoCs, FPGAs and IPs that makes the design verification process extremely efficient.
Agnisys’ IDesignSpec is an award winning engineering tool that allows an IP, chip or system designer to create the register map specification once and automatically generate all possible views from it. Various outputs are possible, such as UVM, OVM, RALF, SystemRDL, IP-XACT etc. User defined outputs can be created using Tcl or XSLT scripts. IDesignSpec’s patented technology improves engineer’s productivity and design quality.
The IDesignSpec automates the creation of registers and sequences guaranteeing higher quality and consistent results across hardware and software teams. As your ASIC or FPGA design specification changes, IDesignSpec automatically adjusts your design and verification code, keeping the critical integration milestones of your design engineering projects synchronized.
Register verification and sequences consume up to 40 percent of project time or more when errors are the source of re-spins of SoC silicon or an increase in the number of FPGA builds. IDesignSpec family of products is available in various flavors such as IDSWord, IDSExcel, IDSOO and IDSBatch.
IDesignSpec more than a tool for creating register models!
Anupam Bakshi, founder, CEO and chairman, Agnisys, said: “IDesignSpec is more than a tool for creating register models. It is now a complete Executable Design Specification tool. The underlying theme is always to capture the specification in an executable form and generate as much code in the output as possible.”
The latest additions in the IDesignSpec are Constraints, Coverage, Interrupts, Sequences, Assertions, Multiple Bus Domains, Special Registers and Parameterization of outputs.
“IDesignSpec offers a simple and intuitive way to specify constraints. These constraints, specified by the user, are used to capture the design intent. This design intent is transformed into code for design, verification and software. Functional Coverage models can be automatically generated from the spec so that once again the intent is captured and converted into appropriate coverage models,” added Bakshi.
Using an add-on function of capturing Sequences, the user is now able to capture various programming sequences in the spec, which are translated into C++ and UVM sequences, respectively. Further, the interrupt registers can now be identified by the user and appropriate RTL can be generated from the spec. Both edge sensitive and level interrupts can be handled and interrupts from various blocks can be stacked.
Assertions can be automatically generated from the high level constraint specification. These assertions can be created with the RTL or in the external files such that they can be optionally bound to the RTL. Unit level assertions are good for SoC level verification and debug, and help the user in identifying issues deep down in the simulation hierarchy.
The user can now identify one or more bus domains associated with Registers and Blocks, and generate appropriate code from it. Special Registers such as shadow registers and register aliasing is also automatically generated.
Finally all of the outputs such as RTL, UVM, etc., can be parameterized now, so that a single master specification can be used to create outputs that can be parameterized at the elaboration time.
How is IDesignSpec working as chip-level assertion-based verification?
Bakshi said: “It really isn’t an assertion tool! The only assertion that we automatically generate is from the constraints that the user specifies. The user does not need to specify the assertions. We transform the constraints into assertions.”
Selection of the right on-chip network is critical to meeting the requirements of today’s advanced SoCs. There is easy IP integration with IP cores from many sources with different protocols, and an UVM verification environment.
John Bainbridge, staff technologist, CTO Office, Sonics Inc., said that it optimizes the system performance. Virtual channels offer efficient resource usage – saves gates and wires. The non-blocking network leads to an improved system performance. There are flexible topology choices with optimal network to match requirements.
Power management is key with advanced system partitioning, and an improved design flow and timing closure. Finally, the development environment allows easy design capture and has performance analysis tools.
For the record, there are several SoC integration challenges that need to be addressed, such as IP integration, frequency, throughput, physical design, power management, security, time-to-market and development costs.
SGN exceeds requirements
SGN met the tablet performance requirement with fabric frequency of 1066MHz. It has an efficient gate count of 508K gates. There are features such as an advanced system partitioning, security and I/O coherency. There is support for system concurrency as well as advanced power management.
Sonics offers system IP solutions such as SGN, a router based NoC solution, with flexible partitioning and VC (Virtual Channel) support. The frequency is optimized with credit based flow control.
SSX/SLX is message based crossbar/ShareLink solutions based on interleaved multi-channel technology. It has target based QoS with three arbitration levels. The SonicsExpress is for power centric clock domain crossing. There is sub-system re-use and decoupling. The MemMax manages and optimizes the DRAM efficiency while maintaining system QoS. There is run-time programmability for all traffic types. The SonicsConnect is a non-blocking peripheral interconnect.
Skin inspired electronics can be used for mobile health such as wireless sensor bands, cell phone and computer at doctor’s office, according to Prof. Zhenan Bao, Stanford University. She was delivering the inaugural lecture on day two of the ongoing 13th Global Electronics Summit in Santa Cruz, USA.
There are organic field-effect transistors (OTFTs). The current flow is moderated by binding of molecules and pressure. E-skin sensor functions have touch (pressure) sensors, chemical sensors and biological sensors. There are other flexible pressure sensors such as conductive rubber, which is thick and has hysteresis. Another type is poly-vinylidene fluoride (PVDF) thin film. Yet another type is the OTFT touch (pressure) sensor.
There is an example of the heart pulse measurement. Another related device is the full pulse wave for medical diagnostics such as blood pressure monitoring, detecting arrhythmia, heart defects and vascular diseases. In terms of temperature sensing, Stanford has developed a flexible body temperature sensor made of plastic.
There is chemical sensing as well. These are very stable and can be put in sea water. There are also electronics to mimic the body, such as the biodegradable OTFT. Another example is the transparent, stretchable pressure sensor. Finally, the other attribute of the human skin is self healing. Stanford University also developed the all-self-healing e-skin.
The e-skin concept ‘Super Skin’ has touch pressure sensors, chemical or biological sensors in air – electronic nose and liquid environments – electronic tongue, flexible strechable materials, biocompatible or biodegradable, self-powered — strechable solar cells and self healing.
Geo Semiconductor Inc. has been enabling new markets that are changing the world. In automotive, it is into HUDs, Fisheye cameras and digital calibration. In cloud/Skype camera, it is into home monitoring, doorbell cameras, and Skype TV.
According to Brian Gannon, VP Marketing & Business Development, Geo is a four-year old company, built from 20+ years of development and $300 million+ investment. It has over 50+ customers in production worldwide. All of this IP allows Geo to provide unique, end-to-end solutions to create new markets. He was speaking at the ongoing 13th Global Electronics Summit at Santa Cruz, USA.
Geo has been creating better user experience with motion detection algorithm. Geo’s eWARP processor is a highly efficient hardware block that can be programmed to do any geometric transformation of pixels in real-time.
The eWARP processor is fundamental to camera and projection systems. For the camera, it is correcting distortions, such as wide angle, fisheye, lateral color, etc. It takes care of ePTZ, fisheye, panoramic dewarping and scaling. It is also stitching/blending cameras. Geo provides 3D alignment for stereoscopic cameras as well. Finally, it takes care of the camera optical alignment.
For the projection, the eWARP processor is correcting distortions such as projection optics and keystone correction. It also takes care of ultra short throw, stitching/blending – tiled displays, curved displays and color correction.
Geo provides the only solution that can concatenate multiple transforms. It does multiple independent geometric corrections. An example is enabling real-time ePTZ. There are custom layouts and views, along with real-time HD resolutions up to 60fps. There are up to eight multiple images.
Wide angle lens correction is possible with zero content loss. The heads-up display (HUD) solution corrects for windshield and projector. It simultaneously corrects for any distortion created by the windshield, projector or mirror — instantly and digitally. It removes any alignment parts and electronics in the HUD system. Calibration can be automated to save labor costs.
Geo’s powerful automation software also reduces labor costs and cycle time. For instance, a single eWARP IC can correct, align and dewarp four automotive VGA cameras.
This is a continuation of my coverage of the fortunes of the global semiconductor industry. I would like to acknowledge and thank Mike Cowan, an independent semiconductor analyst and developer of the Cowan LRA model, who has provided me the latest numbers.
According to the WSTS’s Jan 2013 HBR (posted on March 8th, 2013), January 2013’s actual global semiconductor sales came in at $22.824 billion. This actual sales result for January is 2.9 percent higher than January’s sales forecast estimate, namely $22.180 billion.
Plugging January’s actual sales number into the Cowan LRA forecasting model yields, the following quarterly, half-year, and full year sales and sales growth forecast expectations for 2013 compared to 2012 sales depicted in the table.
It should be highlighted that with last month’s publishing of the final 2012 sales result by the WSTS, the Cowan LRA Model for forecasting global semiconductor sales was updated to incorporate the full complement of 2012′s monthly sales numbers, thereby capturing 29 years of historical, global semiconductor (actual) sales numbers as gathered, tracked and published each month by the World Semiconductor Trade Statistics (WSTS) on its website.
As described last month, the necessary mathematical computations required in order to update the complete set of linear regression parameters embedded in the Cowan LRA forecasting model for determining future sales were carried out. The newly derived set of linear regression parameters therefore reflect 29 years (1984 to 2012) of historical global semiconductor sales as the basis for predicting future quarterly and full year sales and sale growth forecast expectations by running the Cowan LRA Model.
Therefore, the table given above summarizes the model’s latest, updated 2013 sales and sales growth expectations reflecting the WSTS’s January 2013′s actual sales as calculated by the model’s newly minted set of linear regression parameters.
Note that the latest Cowan LRA Model’s expected 2013 sales growth of 6.6 percent relative to 2012 final sales ($291.562 billion) is more bullish than the WSTS’s adjusted Autumn 2012 sales growth forecast of 3.9 percent as well as the WSTS’s Autumn 2012′s original forecasted sales growth of 4.5 percent which was released back in November of last year.
In addition to forecasting 2013’s quarterly sales estimates the Cowan LRA Model also provides an forecast expectation for February 2013’s sales, namely $22.436 billion. This sales forecast yields a 3MMA forecast for February of $23.571 billion assuming the no or minimal sales revision is made to January’s actual sales.
Finally, the table provided below details the monthly evolution for 2013’s sales and sales growth forecast predictions as put forth by the Cowan LRA forecasting model dating back to September of last year.
Note that the most recent 2013 sales growth forecast is up compared to the previous two forecasts of 5.5 percent and 3.6 percent, respectively.
It should be mentioned that the previous 2013’s sales growth forecast for Dec 2012, namely 3.6 percent, was based upon a sales forecast estimate for Jan 2013 versus the latest sales growth forecast estimate of 6.6 percent, which utilizes Jan’s actual sales result just released in the WSTS’s January 2013 HBR, Historical Billings Report.
Components Direct is a leading source for authorized end-of-life and excess electronic components. The products are guaranteed grade A factory sealed direct from the manufacturer and inventoried in a ESD 20.20 certified and ISO 9001 certified state-of-the art-facility. Components Direct is headquartered in Milpitas, CA with locations in the US and Asia.
It has a leading cloud-based platform for excess and obsolete (E&O) inventory. In 2012, Avnet and Components Direct entered in a strategic relationship. Components Direct is the exclusive channel for Avnet’s factory authorized excess and end-of-life components.
Compared to leading industry giants, such as Element14 and RS Components, Components Direct, currently, doesn’t have a detailed menu showcasing listed products, at least not on the home page, as yet. One hopes that’ll make an appearance soon.
Speaking on the mission of Components Direct, Anne Ting, executive VP, Marketing said: “Components Direct is the premier authorized distributor for excess and end-of-life electronic components. We are the only company working directly with manufacturers and their franchised distributors to offer 100 percent guaranteed traceable E&O components as well as technology services to combat counterfeit components and other gray market activity.
“For our supplier partners, we enable them to put excess product back into the control of an authorized source, as opposed to the gray market. For buyers, we provide them with a secure, authorized one-stop shop for excess, obsolete and unsold factory components.”
Combating gray market
How important is it to combat the gray market? Why will this endeavor stop/lessen gray market activity?
According to Ting, the gray market is a serious and growing problem. As early as 2008, a study by KPMG and the Alliance for Gray Market and Counterfeit Abatement (AGMA) stated that as much as $58 billion of technology products were passing through the gray market, and the problem has only gotten worse.
The gray market is rampant throughout all industries, with everyone from engineers, to procurement professionals and consumers impacted negatively when the products they purchase are advertised as new and authentic, but in reality could be used, refurbished or even worse, counterfeit.
In fact, a 2012 study by market research firm IHS found that over 12 million counterfeit electronics and semiconductor components
have entered the distribution chain since 2007, with 57 percent of all counterfeit parts obsolete or end-of-life components. Many of these parts make their way into mission-critical industries, such as defense and aerospace, where a malfunctioning counterfeit part can mean the difference between life and death.
While provisions in the 2012 National Defense Authorization Act have enabled the government and trade groups to make some progress towards regulating the supply chain to ensure that components are only sourced directly from the manufacturers or their franchised distributors, the problem has not abated. The Act empowers the federal government to hold contractors financially responsible for replacing counterfeit products.
This, together with other changes, puts more responsibility on suppliers of electronic component to have risk mitigation procedures in place. The issue is become more topical and the industry must act in order to comply with the new legislation.
Components Direct takes this problem seriously, and provides supplier insights and tools to help combat gray market activity. In a recent study we conducted for a leading semiconductor supplier of both analog and digital devices, we discovered that over 124 million units of their product were floating in the gray market across 6,500 plus part numbers.
Over 70 percent of the products were found in Asia, and 20 percent also appeared in both North America and EMEA. The product age spanned many years with date codes of less than one year accounting for 22 percent of their gray market product. A further 5 percent had date codes over 11 years, demonstrating that whether you were an OEM looking for the newest product, or a military sub-contractor looking for obsolete components, no end customer is immune to the presence of unauthorized product.
Components Direct’s technology tools and services track gray market activity and provide suppliers with unprecedented visibility to their product leakage in the gray market by part number, region, data code etc. This data enables our suppliers to trace leakage in their supply chain and lessen potential unauthorized product from getting into the gray market.
Additionally, Components Direct provides suppliers and buyers with a secure, factory authorized channel for selling or purchasing 100 percent guaranteed traceable components. “We only sell products that come directly with manufacturers or their franchised distributors and all our products are inventoried in an ESD 20.20 and ISO 9001 certified facility,” said Ting.As an extension of the manufacturer, Components Direct provides the supply chain buyer with complete confidence and peace of mind that all products originate directly from the manufacturer and have been properly stored, handled and packaged. Sourcing from an authorized source like Components Direct eliminates the risks surrounding product quality, reliability and liability. Read more…
Flip-Chip is a chip packaging technique in which the active area of the chip is ‘flipped over’ facing downward, instead of facing up and bonded to the package leads with wires from the outside edges of the chip.
Any surface area of the Flip-Chip can be used for interconnection, which is typically done through metal bumps. These bumps are soldered onto the package and underfilled with epoxy. The Flip-Chip allows for a large number of interconnects with shorter distances than wire, which greatly reduces inductance.
According to Lionel Cadix, market and technology analyst, Yole Developpement, France, metal bumps can be made of solder (tin, tin-lead or lead-free alloys), copper, gold and copper-tin or Au-tin alloys. The package substrates are epoxy-based (organic substrates), ceramic based, copper based (leadframe substrates), and silicon or glass based.
In the period 2010-2018, Flip-Chip will likely grow at a CAGR of 19 percent. In 2012, laptop and desktop PCs were the top end products using Flip-Chip. It represents 50 percent of the Flip-Chip market by end product with more than 6.2 million of wafer starts. PCs are followed by smart TV and LCD TVs (for LCD drivers), smartphones and high performance computers.
The Flip-Chip market in 2012 is around $20 billion, selling 20 billion units approximately in 12’’ equivalent wafers. Taiwan is so far the no. 1 producer. At least 50 percent of the Flip-Chips devices get into end products. By 2018, the Flip-Chip market should grow to a $35 billion market, selling 68 billion units.
Applications and market focus
Looking at the applications and market focus, Flip-Chip technology is already present in a wide range of application, from high volumes/consumer applications, to low volumes/high end applications. All these applications have their own requirements, specifications and challenges!
Some of these are military and aerospace, medical devices, automobiles, HPC, servers, networks, base stations, etc, in low volumes. It is present in set-top boxes, game stations, smart TVs/displays, desktops/laptops and smartphones/tablets in high volumes. Flip-chip applications are also in imaging, logic 2D SoCs, HB-LEDs, RF, power, analog and mixed-signal, stacked memories, and logic 3D-SiP/SoCs.
In computing applications, for instance, the Intel core i5 is the first MCM combining a 77mm2 CPU together with a 115mm2 GPU in a 37.5mm side package. Solder bumps with a pitch of 185μm are used for the slicon to substrate (1st) interconnect. This MCM configuration is suitable for office applications, with relatively low demanding processing powers. For mobile/wireless applications, there are opportunities for MEMS in smartphones/feature phones. Similarly, Flip-Chip is available for consumer applications.
For microbumping in interposers for FPGA there is a focus on Xilinx Virtex 7 HT. Last year, Xilinx announced a single-layer, multi-chip silicon interposer for its 28nm 7 series FPGAs. Key features include two million logic cells for a high level of computational performance, and high bandwidth, four slice processed in 28 nm, 25 x 31mm, 100 μm thick silicon interposer, 45 um pitch microbumps and 10 μm TSV, and 35 x 35 mm BGA with 180 μm pitch C4 bumps.
Even if the infrastructure had been ready for full 3D stacking, the 2.5D Interposer would still have been the right choice for FPGAs since the ’10,000 routing connections’ would have used up valuable chip area, making the chip slices larger and more costly than they are now. Virtex 7 HT will consist of three FPGA slices and two 28 gbps SerDes chips on an Interposer capable of operating at 2.8 Tb/sec.
Sensor fusion encompasses hardware and software elements. There can be many data sources, such as MEMS. non-MEMS, etc.
The obvious question: why sensor fusion? Tony Massimini, chief of technology, Semico Research Corp., USA, said that it is useful for power savings, and the initial reason was to improve accuracy and reliability of inertial measurement units (IMUs, etc. If we look at the progression of sensors to sensor fusion, there have been simple interrupts such as screen orientation, tap detection, fall detection, and so on. IMUs are available for location-based services (LBS) and navigation, and IMUs are available and other data sources, etc.
Senosr fusion enhances user experience with portable devices. The growth is driven by smartphones. Competing devices will add more features to keep up with smartphones such as tablets, notebooks (ultraportables). Key growth markets today will provide basis for future end use markets (see graph: systems with sensor fusion). The market will likely grow at CAGR of 58.8 percent till 2016.
New end use markets and applications include areas such as gaming, HUD (heads-up display), sports, health and fitness, personal navigation, personal medical, context awareness, voice recognition, visual recognition, augmented reality and automation.
Sensor fusion is used for enhancing the user experience. For instance, add data to 3D axes frame of reference. Sensor fusion offers always ON and low latency. You can also connect to external sensors — wearable for health and fitness. Life tagging is possible too, e.g. photo and video library for context aware services. Next, there is improved security with biometrics.
Summarizing the sensor fusion market, the MEMS sensor ASPs continue to erode. There are an increasing number of sensors. There are improved MEMS sensors, including hardware accelerators. There is interaction with cloud for data. It also enables application innovations. Finally, there are new end use markets.
This is a continuation of my coverage of the fortunes of the global semiconductor industry. I would like to acknowledge and thank Mike Cowan, an independent semiconductor analyst and developer of the Cowan LRA model, who has provided me the latest numbers.
With the ‘closing out’ of the final, overall sales result for 2012 by the WSTS, the Cowan LRA model for forecasting global semiconductor sales has been updated to include the full complement of 2012′s monthly sales numbers, thereby incorporating 29 years of historical, global semiconductor (actual) sales numbers as gathered, tracked and published each month by the World Semiconductor Trade Statistics (WSTS) organization.
The necessary mathematical computations required to update the complete set of linear regression parameters embedded in the Cowan LRA forecasting model have been carried out.
The newly derived set of linear regression parameters reflect 29 years (1984 to 2012) of historical global semiconductor sales numbers as a basis of predicting future quarterly and full year sales and sale growth forecast expectations by exercising the Cowan LRA model.
Therefore, the table given here summarizes the model’s latest 2013 sales and sales growth expectations as a function of the model’s range (low, expected and high) for January 2013′s sales forecast estimates as generated by the newly, updated model’s linear regression parameters.
It is estimated that in 2013, the global semiconductor industry is likely to reach $302.022 billion, a growth of 3.6 percent.
Note that next month’s forecast will be based on January 2013′s actual sales number, which is anticipated to be released by the WSTS at the end of the first week in March. Once posted, the model will be rerun to yield the quarterly and full year sales, and sales growth expectations for 2013, respectively.
SLIMbus is a multi-drop, time division multiplexed serial bus. It has one clock and one data line, with CMOS signalling and no analog PHY. It is targeted for low bandwidth connectivity between the AP/modem and audio/Bluetooth/haptic. SLIMbus was originally specified by the MIPI Alliance in 2007. Arasan’s total IP solution delivery demystifies the adoption of SLIMbus.
According to Ajay Jain, director, Mobile Connectivity Products, Arasan Chip Systems, the SLIMBus system overview includes a host component (e.g., apps processor), a device component (e.g., a broadband modem), and a SLIMbus device component (e.g., audio processor, Bluetooth modem). The logical implementation of SLIMbus system feature is realized through devices within SLIMbus IPs.
The AP/modem have software infrastructure and an active manager device that manages the SLIMbus. Any component can have a framer device activated to drive the SLIMbus CLK. Each component can have one or more generic devices to buffer and transmit/receive audio and other data.
The physical layer enables TDM. The data line NRZI is encoded. The active framer can drive clock gears 1 to 10 for power management. There is an interleaving of control and data on the SLIMbus frames.
As far as device evaluation and enumeration are concerned, each component initializes its devices in correct order under the direction of the interface device. The active framer drives the SLIMbus CLK and framing channels with default values. All components perform frames, superframes and message synchronization. All active devices report presence and characteristics with broadcast messages. Arasan provides the software stack to perform SLIMbus.
The SLIMbus allows a finite set of channel rate multipliers (data segments/superframes). If SLIMbus CLK frequency, it allows channel rate multiplier of audio data rate. Other transfer protocols may be preferred in certain cases, e.g., flow control required, pushed or pulled protocol. All transfer protocols are programmable through the Arasan software stack.
Each port-port connection needs to be mapped onto a SLIMbus data channel. There is two-channel audio on SLIMbus data channels 6 and 7. A subframe length of 32 slots is assumed. The SLIMbus is amazing, yet complex. There are a finite set of parameters. Arasan’s IPs have addressed the low-level complexities of implementation.