Dr. Wally Rhines on global semiconductor industry trends for 2013

It is always a pleasure speaking with Dr. Walden (Wally) C. Rhines, chairman and CEO, Mentor Graphics Corp. I met him on the sidelines of the 13th Global Electronics Summit, held at the Chaminade Resort & Spa, Santa Cruz, USA.

Status of global EDA industry

Dr. Wally Rhines.

First, I asked Dr. Rhines how the EDA industry was doing. Dr. Rhines said: “The global EDA industry has been doing pretty well. The results have been pretty good for 2012. In general, the EDA industry tends to follow the semiconductor R&D by at least 18 months.”

For the record, the electronic design automation (EDA) industry revenue increased 4.6 percent for Q4 2012 to $1,779.1 million, compared to $1,700.1 million in Q4 2011.

Every region, barring Japan, grew in 2012. The Asia Pacific rim grew the fastest – about 12.5 percent. The Americas was the second fastest region in terms of growth at 7.4 percent, and Europe grew at 6.8 percent. However, Japan decreased by 3 percent in 2012.

In 2012, the segments that have grown the fastest within the EDA industry include PCB design and IP, respectively. The front-end CAE (computer aided engineering) group grew faster than the backend CAE. By product category, CAE grew 9.8 percent. The overall growth for license and maintenance was 7 percent. Among the CAE areas, design entry grew 36 percent and emulation 24 percent, respectively.

DFM also grew 28 percent last year. Overall, PCB grew 7.6 percent, while PCB analysis was 25 percent. IP grew 12.6 percent, while the verification IP grew 60 percent. Formal verification and power analysis grew 16 percent each, respectively. “That’s actually a little faster than how semiconductor R&D is growing,” added Dr. Rhines.

Status of global semicon industry
On the fortunes of the global semiconductor industry. Dr. Rhines said: “The global semiconductor industry grew very slowly in 2012. Year 2013 should be better. Revenue was actually consolidated by a lot of consolidations in the wireless industry.”

According to him, smartphones should see further growth. “There are big investments in capacities in the 28nm segment. Folks will likely redesign their products over the next few years,” he said. “A lot of firms are waiting for FinFET to go to 20nm. People who need it for power reduction should benefit.”

“A lot of people are concerned about Japan. We believe that Japan can recover due to the Yen,” he added.

Embedded systems trends and developer opportunities

Herb Hinstorff.

Today, the world is transitioning from independent devices to  connected systems. Intel has been inside the embedded systems market for over 35 years, having developed 270+ CPUs and SoCs as well as 100+ chipsets.

Herb Hinstorff, director of Marketing, Developer Products Division, Intel Software, said that Intel has been engaged at all levels of the solution stack. He was speaking at the 13th Global Electronics Summit at Santa Cruz, USA.

There are tools to deliver on developer needs, such as debuggers, analyzers, compilers and libraries. There are tools to provide the deep system-level insights into power, reliability and performance.

On the debuggers side, they increase system and device stability and reliability. There is an efficient system, SoC-wide defect analysis and ultra-fast system-wide tracing for software debug. There is an integrated application level debugger. Overall, it speeds system bring-up and development. Analyzers focus on boosting reliability, power efficiency and performance, enabling differentiated designs, system-wide analysis and deep insights.

Compilers go on to optimize performance and efficiency. There is the industry-leading C/C++ compiler. It boosts system and application performance on Intel Atom, Core and Xeon processors. Compilers also take advantage of the multicore to boost performance.

There are libraries for performance and efficiency. Software building blocks increase the developer productivity and boost performance. There are specialized testing functions that handle signal processing, data processing, complex math operations and multimedia processing. Besides, there is future-proof software investments. The libraries provide an easy way to take advantage of the multicore capabilities to boost performance.

The Intel System Studio is an integrated software tool suite that provides deep, system-wide insights to help accelerate time-to-market, strengthen system reliability, and boost power effiency and performance. The JTAG interface has system and application code running Linux.

There is a continued broadening of the OS support, and a broader range of tools to match the expanding SoC capabilities. There is more extensive software based training and simulation, as well as market-specific libraries and APIs.

Given that the market is transitioning from independent devices to connected systems, more capable SoC platforms and complex software stacks require deeper and broader system-level insights and optimizations. Embedded developers can take advantage of the Intel System Studio to accelerate the time-to-market, strengthen system reliability, and boost power efficiency and performance of the Intel architecture-based embedded and mobile systems.

Embedded software: Next revolution in EDA

Dr. Wally Rhines.

There is a key lesson that Mentor Graphics made while trying to deliver solutions that were right for software and hardware developers. The lesson was: tailor the software to the discipline! Make it as similar to their environment as possible!!

Delivering his speech at the ongoing 13th Global Electronics Summit in Santa Cruz, USA, Dr. Wally Rhines, chairman and CEO, Mentor Graphics, said that 15 years of acquisitions taught Mentor how to think and behave as an embedded software company.

Open systems requires active engagement in software committees. Each open source project has some form of governance to manage contributions, release plans, etc. There is a community peer selection process for each open source project. About 50 Mentor Embedded Sourcerers are actively involved in the open source and Android communities.

There is a need to take the advantage of knowing both worlds. Mentor’s Sourcery CodeBench is an embedded C/C++ development tool based on open-source standards. Sourcery CodeBench is a complete development environment for embedded C/C++ development on ARM, Coldfire, MIPS, Power, X86, and other architectures. You can install, flash and debug in minutes!

Sourcery CodeBench
Sourcery CodeBench is now the semiconductor industry’s leading embedded toolchain. There is an integrated development environment. It has the GNU compiler (GCC) and optimization tools. It allows debugging and analysis, libraries and QEMU simulator.

There are about ~15,000 downloads per month. There have been ~150,000 downloads and 300 releases per year.

New set of rules in IGBT market

The insulated-gate bipolar transistor (IGBT) is a three-terminal power semiconductor device. The main trends impacting IGBT include the power stack trend, revolution of Chinese IGBT, growth of IGBT use in consumer applications, and competition from SiC and GaN based devices, respectively.

According to Alexander Avron, Yole Developpement, current density of the IGBT has been multiplied by 3.5 in 20 years. IGBT technology is now very mature, using trenches and thin wafer. Wafer size for IGBT production is still growing and Infineon is currently the leader.

Infineon expects a cost advantage of 20-30 percent by increasing the wafer size from 8- to 12-inches. For Infineon, the 12-inch production line is for MOSFETSs, and they will probably produce IGBT 600V on thin wafer. Fairchild and IR prefer to remain at 8-inch.

Technology roadmap
A new generation release is always a low voltage product (600-900V). Main improvements have been in losses reduction. In the IGBT supply chain, vertically integrated companies are Japanese only, besides a few, like ABB. Only a few companies, like Danfoss, take advantage of doing module and inverter for motor drives. In a cost-driven market, there is not much competitive advantage in developing own module.

Trends impacting IGBT
Power stack trend - The need for more modularity and higher performance made components makers (active and passive) to join and create consortiums or JVs. It is trending toward more integration.

Revolution of the Chinese IGBT - First Chinese companies are starting to manufacture IGBTs using standard technology and low cost, perfect for a local market. Asian players are becoming a greater part of the IGBT market. While they do not make a lot of devices as yet, it is expected that they will quickly gain market shares in low cost local businesses.

Some new entrants include CSMC, Hua-Hong NEC, PSMC, BYD, Grace Semiconductor, Alpha & Omega Semiconductor, etc. Many Chinese companies are very close to or already able to manufacture their own IGBTs. This will grow and create a Chinese IGBT.

Growth of IGBT use in consumer applications - IGBTs are becoming more part of the consumer lifestyle. Renewable energies and EV/HEV are good examples. Pioneers of HV IGBT have the best market shares. Margin for HV IGBT modules is high. It is first in the EV/HEV and renewables markets. New markets are targeted by all players.

Source: Yole Developpement, France.

The ASP evolution of consumer markets has dropped down very fast as compared to the industrial markets. Also, DLB or direct lead bonding is a specific technology from Mitsubishi Electric to produce epoxy molded power modules for hybrid and electric cars. Mass production is targeted for 2013.

Competition from SiC and GaN - Next generation devices are becoming available. They will displace IGBT, but not at all the levels and in all the applications. Characteristics of GaN-based inverters are: they primarily target medium voltage apps (200-600V range). SiC diodes are already in production, mainly coupled with IGBT. Penetration of SiCs in wind turbines will happen later than expected.

As for the 2006-2020 power devices market forecast, Yole expects a more stable growth by 2020. There was an unanticipated slowdown in 2012. The market share in 2011 was Mitsubishi 27 percent, Infineon 23 percent, Fuji Electric 11 percent, etc. The IGBT market share was Infineon 35 percent, Mitsubishi 32 percent, Hitachi 12 percent, ABB 9 percent, respectively.

Yole estimates that at least 15 companies – foundries, fab lights and fabs — are working on IGBT development in China.

E450EDL – European 450mm equipment demo line

Malcolm Penn, chairman and CEO, Future Horizons, sent me the Enable 450 newsletter. The goal of the Enable 450 is: Co-ordination Action to enable an effective European 450 mm Equipment and Materials Network. Here, I am presenting a bit about the E450EDL – European 450mm Equipment demo line.

Malcolm Penn

The aim of the ENIAC E450EDL key enabling technology pilot project is to continue the engagement of the European semiconductor equipment and materials industry in the 450mm wafer size transition that started with the ENIAC JU EEMI450 initiative and proceeded with subsequent projects funded with public money, amongst others NGC450, SOI450, EEM450PR.

The demo line resulting from this project will be such that it will enable first critical process module development by combining imec infrastructure with tools remaining at the site of the manufacturers (distributed pilot line). Multi-site processing will allow partners to participate in the world first 450mm integration studies and will be enabled by the controlled exchange of 450mm wafers between different sites.

The consortium comprises 41 members (from 11 different European countries) with many SMEs and research institutes. The project is organized in five technical work packages and a work package on management and co-ordination.

In the work package on integration and wafer processing first critical modules will be developed and will demonstrate the feasibility of processing on 450mm wafers. The main objective in the work package on lithography is to develop a wafer stage test-rig, which
can be implemented into the pilot line system. In the work package on front end equipment several tools will be developed such as a plasma ion implant module, a plasma dry etch module, a RTP system and a single wafer cleaning system.

Furthermore, in the dedicated work package on metrology 450mm metrology tool types will be developed for amongst others dielectric film thickness and composition measurements, defect inspection, defect review and analysis, optical critical dimensions (CD), overlay (mask and wafer) and 3D metrology.

Finally, from the work package on wafer handling and automation a set of equipment will be provided to support the demo line operations, and facilitate the R&D dedicated to process and metrology modules.

The project will last 36 months beginning on 1st of October 2013. The budget has been given at €204.6 million of which the ENIAC JU will fund €30.8 million. This project is still considering new members so if you are interested please contact ASML.

What technology SoC engineers need for next-gen chips?

About 318 engineers and managers completed a blind, anonymous survey on ‘On-Chip Communications Networks (OCCN), also referred to as an “on-chip networks”, defined as the entire interconnect fabric for an SoC. The on-chip communications network report was done by Sonics Inc. A summary of some of the highlights is as follows.

The average estimated time spent on designing, modifying and/or verifying on-chip communications networks was 28 percent (for the respondents that knew their estimate time).

The two biggest challenges for implementing OCCNs were meeting product specifications and balancing frequency, latency and throughput. Second tier challenges were integrating IP elements/sub-systems and getting timing closure.

As for 2013 SoC design expectations, a majority of respondents are targeting a core speed of at least 1 GHz for SoCs design starts within the next 12 months, based on those respondents that knew their target core speeds. Forty percent of respondents expect to have 2-5 power domain partitions for their next SoC design.

A variety of topologies are being considered for respondents’ next on-chip communications networks, including NoCs (half), followed by crossbars, multi-layer bus matrices and peripheral interconnects; respondents that knew their plans here, were seriously considering an average of 1.7 different topologies.

Source: Sonics Inc., USA.

Twenty percent of respondents stated they already had a commercial Network-on-Chip (NoC) implemented or plan to implement one in the next 12 months, while over a quarter plan to evaluate a NoC over the next 12 months. A NoC was defined as a configurable network interconnect that packetizes address/data for multicore SoCs.

For respondents who had an opinion when commercial Networks-on-Chip became an important consideration versus internal development when implementing an SoC, 43 percent said they would consider commercial NoCs at 10 or fewer cores; approximately two-thirds said they would consider commercial NoCs at 20 or fewer cores.

The survey participants’ top three criteria for selecting a Network on Chip were: scalability-adaptability, quality of service and system verification, followed by layout friendly, support for power domain partitioning. Half of respondents saw reduced wiring congestion as the primary reason to use virtual channels, followed by increased throughput and meeting system concurrency with limited bandwidth.

Focus on SiC power electronics business 2020

SiC is implemented in several power systems and is gaining momentum and credibility.

Yole Developpement stays convinced that the most pertinent market for SiC lands in high and very high voltage (more than 1.2kV), where applications are less cost-driven and where few incumbent technologies can’t compete in performance. This transition is on its way as several device/module makers have already planned such products at short term.

Even though EV/HEV skips SiC, the industry could expand among other apps. The only question remains: Is there enough business to make so many contenders live decently? Probably, yes, as green-techs are expanding fast, strongly requesting SiC. Newcomers should carefully manage strategy and properly size capex according to the market size.

Source: Yole Developpement, France.

Power electronics industry outlook
Electronics systems were worth $122 billion in 2012, and will likely grow to $144 billion by 2020 at a CAGR of 1.9 percent. Power inverters will grow from $41 billion in 2012 to over $70 billion by 2020 at a CAGR of 7.2 percent. Semiconductor power devices (discretes and modules) will grow from $12.5 billion in 2012 to $21.9 billion by 2020 at a CAGR of 7.9 percent. Power wafers will grow $912 million in 2012 to $1.3 billion by 2020 at a CAGR of 5.6 percent.

Looking at the power electronics market in 2012 by application and the main expectations to 2015, computer and office will account for 25 percent, industry and energy 24 percent, consumer electronics 18 percent, automotive and transport 17 percent, telecom 7 percent and others 9 percent.

The main trends expected for 2013-2015 are:
* Significant increase of automotive sector following EV and HEV ramp-up.
* Renewable energies and smart-grid implementation will drive industry sector ramp-up.
* Steady erosion of consumer segment due to pressure on price (however, volumes (units) will keep on increase).

The 2011 power devices sales by region reveals that overall, Asia is still the landing-field for more than 65 percent of power products. Most of the integrators are located in China, Japan or Korea. Europe is very dynamic as well with top players in traction, grid, PV inverter, motor control, etc. Asia leads with 39 percent, followed by Japan with 27 percent, Europe with 21 percent and North America with 13 percent.

The 2011 revenues by company/headquarter locations reveals that the big-names of the power electronics industry are historically from Japan. Nine companies of the top-20 are Japanese. There are very few power manufacturers in Asia except in Japan. Europe and US are sharing four of the top five companies. Japan leads with 42 percent, followed by Europe and North America with 28 percent each, respectively, and Asia with 2 percent.

Looking at the TAM comparison for SiC (and GaN), very high voltage, high voltage of 2kV and medium voltage of 1.2kV appear as a more comfortable area for SiC. The apps are less cost-driven and SiC added value is obvious. Low voltage from 0-900V is providing strong competition with traditional silicon technologies, SJ MOSFET and GaN. There are cost-driven apps.

Xilinx targets growing ASIC and ASSP gaps

Xilinx Inc. has announced solutions for significant and growing gaps in ASIC and ASSP offerings targeting next-generation smarter networks and data centers. It has been acquiring and developing a SmartCORE IP portfolio and a critical mass of application specialists and services that leverage Xilinx’s All Programmable FPGAs, SoCs, and 3D ICs.

Neeraj Varma.

To find out more about how are Xilinx’s solutions targeting growing ASIC and ASSP gaps for next-gen smarter networks and data centers, I spoke with Neeraj Varma, director, Sales-India, Xilinx. He said: “Over the past several years, Xilinx has been making a transition from the leading FPGA vendor to a provider of All Programmable Solutions for Smarter Systems. With its All Programmable 7 Series FPGAS, All Programmable SoCs and the VivadoTM Design Suite, Xilinx now offers a comprehensive set of solutions that provide end-to-end system implementation.

“Through strategic acquisitions, investments in silicon products and IP development, Xilinx has started to replace entire ASSPs and ASICs in the communications market by offering a complete IP cores portfolio which allows customers to design Smarter Systems for networking, communications and data center applications.

“Xilinx is calling this set of IP cores, SmartCORE IP, because they are the critical application-specific building blocks needed to develop smarter networking and communications systems. We are responding to market need and that need has accelerated recently as the viability of ASICs and more recently ASSPs have been severely challenged. Xilinx is a generation ahead in SoC and tools and its leadership at 28nm borne out with revenue ramp.”

Developing SmartCORE IP portfolio
What is meant by Xilinx acquiring and developing a SmartCORE IP portfolio and a critical mass of application specialists and services?

According to him, 28nm design process devices require a new and a different set of tools to exploit all the capabilities. That was one of the reasons for Xilinx to invest heavily in resources and time to come up with the Vivado Design Suite, to be able to support the large designs and get them into production with minimal effort and ease.

Vivado supports the growing use of IP blocks to reduce the complexity of the designs which are very critical in the implementation of complex networking and communications systems. This is one of the main reasons Xilinx spent years to develop strategic partnerships and making acquisitions such as Omiino (OTN IP solutions), Modelware (Traffic Management and Packet processing IP solutions), Sarance (Ethernet and Interlaken IP solutions) and Modesat (Microwave and Eband backhaul IP solutions) to offer a comprehensive set of IP cores to design Smarter Systems for networking, communications and data centre applications.

How are the solutions going to address the challenges with ASICs and ASSPs?

He said that ASICs and ASSPs targeting the communications, networking, and data center equipment markets have been disappearing at a surprisingly rapid pace due to many factors, including escalating IC-design costs and the need for much greater levels of intelligence and adaptability—all driven by wide variance in application and device requirements.

Additionally, the equipment markets no longer accept “me too” equipment design, which means that ASSP-based equipment design has almost vanished due to limited flexibility. These growing gaps are pervasive across all markets.These challenges, coupled with the rapidly increasing design costs and lengthy design cycles for both ASICs and ASSPs have created significant solution gaps for equipment design teams.

ASSPs and ASICs are either too late to market to meet OEM or operator requirements, are significantly overdesigned to satisfy the superset requirements of many diverse customers, are not a good fit for specific target applications, and/or provide limited ability for customers to differentiate their end products. Equipment vendors face many or all of these gaps when attempting to use the solutions offered by ASIC and ASSP vendors.

Global semicon sales to grow 6.6 percent in 2013: Cowan LRA model

This is a continuation of my coverage of the fortunes of the global semiconductor industry. I would like to acknowledge and thank Mike Cowan, an independent semiconductor analyst and developer of the Cowan LRA model, who has provided me the latest numbers.

According to the WSTS’s Jan 2013 HBR (posted on March 8th, 2013), January 2013’s actual global semiconductor sales came in at $22.824 billion. This actual sales result for January is 2.9 percent higher than January’s sales forecast estimate, namely $22.180 billion.

Source: Cowan LRA model, USA.

Plugging January’s actual sales number into the Cowan LRA forecasting model yields, the following quarterly, half-year, and full year sales and sales growth forecast expectations for 2013 compared to 2012 sales depicted in the table.

It should be highlighted that with last month’s publishing of the final 2012 sales result by the WSTS, the Cowan LRA Model for forecasting global semiconductor sales was updated to incorporate the full complement of 2012′s monthly sales numbers, thereby capturing 29 years of historical, global semiconductor (actual) sales numbers as gathered, tracked and published each month by the World Semiconductor Trade Statistics (WSTS) on its website.

As described last month, the necessary mathematical computations required in order to update the complete set of linear regression parameters embedded in the Cowan LRA forecasting model for determining future sales were carried out. The newly derived set of linear regression parameters therefore reflect 29 years (1984 to 2012) of historical global semiconductor sales as the basis for predicting future quarterly and full year sales and sale growth forecast expectations by running the Cowan LRA Model.

Therefore, the table given above summarizes the model’s latest, updated 2013 sales and sales growth expectations reflecting the WSTS’s January 2013′s actual sales as calculated by the model’s newly minted set of linear regression parameters.

Note that the latest Cowan LRA Model’s expected 2013 sales growth of 6.6 percent relative to 2012 final sales ($291.562 billion) is more bullish than the WSTS’s adjusted Autumn 2012 sales growth forecast of 3.9 percent as well as the WSTS’s Autumn 2012′s original forecasted sales growth of 4.5 percent which was released back in November of last year.

In addition to forecasting 2013’s quarterly sales estimates the Cowan LRA Model also provides an forecast expectation for February 2013’s sales, namely $22.436 billion. This sales forecast yields a 3MMA forecast for February of $23.571 billion assuming the no or minimal sales revision is made to January’s actual sales.

Finally, the table provided below details the monthly evolution for 2013’s sales and sales growth forecast predictions as put forth by the Cowan LRA forecasting model dating back to September of last year.

Source: Cowan LRA model, USA.

Note that the most recent 2013 sales growth forecast is up compared to the previous two forecasts of 5.5 percent and 3.6 percent, respectively.

It should be mentioned that the previous 2013’s sales growth forecast for Dec 2012, namely 3.6 percent, was based upon a sales forecast estimate for Jan 2013 versus the latest sales growth forecast estimate of 6.6 percent, which utilizes Jan’s actual sales result just released in the WSTS’s January 2013 HBR, Historical Billings Report.

Sensor fusion and converging elements

Sensor fusion encompasses hardware and software elements. There can be many data sources, such as MEMS. non-MEMS, etc.

The obvious question: why sensor fusion? Tony Massimini, chief of technology, Semico Research Corp., USA, said that it is useful for power savings, and the initial reason was to improve accuracy and reliability of inertial measurement units (IMUs, etc. If we look at the progression of sensors to sensor fusion, there have been simple interrupts such as screen orientation, tap detection, fall detection, and so on. IMUs are available for location-based services (LBS) and navigation, and IMUs are available and other data sources, etc.

Source: Semico Research, USA.

Senosr fusion enhances user experience with portable devices. The growth is driven by smartphones. Competing devices will add more features to keep up with smartphones such as tablets, notebooks (ultraportables). Key growth markets today will provide basis for future end use markets (see graph: systems with sensor fusion). The market will likely grow at CAGR of 58.8 percent till 2016.

New end use markets and applications include areas such as gaming, HUD (heads-up display), sports, health and fitness, personal navigation, personal medical, context awareness, voice recognition, visual recognition, augmented reality and automation.

Sensor fusion is used for enhancing the user experience. For instance, add data to 3D axes frame of reference. Sensor fusion offers always ON and low latency. You can also connect to external sensors — wearable for health and fitness. Life tagging is possible too, e.g. photo and video library for context aware services. Next, there is improved security with biometrics.

Summarizing the sensor fusion market, the MEMS sensor ASPs continue to erode. There are an increasing number of sensors. There are improved MEMS sensors, including hardware accelerators. There is interaction with cloud for data. It also enables application innovations. Finally, there are new end use markets.