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Take care of thermal distribution for higher-layer PCBs

March 31, 2007

This is an extension to an earlier piece on the subject. During my various meetings in Hong Kong, I found Johnny Keung, deputy general manager, Circuitone, as a very good resource for discussing PCB services.

He described that immersion tin was economical, complied with RoHS, could replace immersion gold, and go fine line width. Circuitone offers 4µx4µ line width. As for spacing, it can go down to 3µ spacing.

The board size can be limited by equipment. Circuitone has equipment that handles 24x24inch board sizes. It can also offer 0.003” line width (3µx3µ) for high-density PCBs in large volumes. It offers minimum hole-width of 0.2mm, and plans to offer 0.1mm hole-width by Q4-07. This is indeed significant.

There had been some reports in the trade press regarding some Mainland Chinese PCB fabricators offeing 20- and even 40-layer PCBs.

Keung said there were two benchmarks. One, switching from double-sided to four layers, and two, switching from four layers to six layers.

He pointed out that Circuitone could use technology from six layers up to 20 layers. If it went beyond 20 layers, for example, 22 layers, there may be difficulties with thermal distribution within the board.

As I understand from our discussions, for up to 20 layers or so, heat distribution was on the top layer of the PCB, while distribution across middle layer could be uneven. Layers at the bottom could experience higher heat transfer than those in the middle.

Even PCB pressing is done in two stages: one, increase heat so the bonding sheet started to melt, and two, if temperature kept increasing, the glue was transformed into solid. This was the final curing stage.

Commenting on 40-layer PCBs, Keung commented that those boards at the outer layer would likely start melting, and those at the core layer would be in solidstate. When heat was being transferred into core layer, the evenness of distribution changed. The outer layer would remain in solidstate as well. So, expansion/contraction could get uneven, and registration could be a big challenge.

Fabricators should definitely look into this aspect, before designing higher-layer PCBs. I believe, some research work has been done by PCB makers to develop higher-layer PCBs. We discussed the yield rate earlier. That has to rise.

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