Home > Cadence, EDA, PCB services, PCBs, Semicondutors > Next-gen PCB design with Allegro

Next-gen PCB design with Allegro

May 28, 2007

Cadence was kind enough to discuss its Allegro solution with me recently. The solution aims at enhancing the productivity for next-generation PCB designs.

According to Steve Kamin, Group Director, Cadence’s Allegro systems division, customers face constraints such as higher frequency, power consumption, pin counts, packages, etc. The PCB designers also face challenges such as decreasing hole sizes, hole diameter, etc.

Features of the Allegro include GUI (graphical user interface) modernization, context sensitive editing paradigm, color and visibility improvements, integration of physical and spacing constraints into the Constraint Manager, and an interactive planning and global routing, respectively.

In a PCB design flow, Cadence has focused on usability and productivity. The Allegro has a modernized GUI. All of the tool bars have been completely refreshed. Cadence has also added foldaway windows.

Cadence has added context-sensitive editing and included an open GL graphics engine that improves the visibility of objects and components on a board. This release can handle all sorts of intricate designs.

It has also addressed the physical and spacing constraints, which has been included that into the Constraint Manager. This is a cockpit, a spreadsheet-based tool, which manages all of the properties. Cadence is selling this solution to OEMs, ODMs, PCB design services companies, etc.

The Allegro solution has an interactive planning and global routing facility. Cadence has also added an entry-level product in the OrCAD PCB Designer Basics. Its GRE is a new, next-generation technology, which has two new elements — the interactive flow planner and the Global Route Environment.

The GRE cuts to 1-2 iteration of routing. Customers can control the direction of the routes. Fabricators sometimes have had to kill the design as they could not control the routing or it was not possible. Hence, Allegro takes care of this issue. It saves significant time, from 15 months to about three months.

Allegro facilitates an improved design creation and simulation as well. The Allegro System Architect has differential pairs support and improved schematic generation. Other features include physical and spacing constraints in Allegro Design Entry HDL, performance and convergence improvements in Cadence Pspice and Allegro AMS Simulator, etc. Cadence has improved the automatic schematic generator. Also, in the analog simulation product line, it has added the automated convergence capability.

Finally, the company has added Cadence Help across all of its products. This allows cross-linking across all Cadence’s tools. Customers can also add their own content. Cadence integrates third-party thermal integration tools into the products.

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Categories: Cadence, EDA, PCB services, PCBs, Semicondutors Tags: ,
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