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Programmable imperative: Changing semicon landscape!

February 14, 2009

This post is based on a presentation recently made by Amit Dhir, Senior Director, Business Operations, Xilinx, prior to the launch of the Xilinx Virtex-6 and Spartan-6 FPGA families. Xilinx was very kind to share this with me, and I need to thank him and Neeraj Varma, Country Manager – Sales (India/ANZ) for Xilinx.

Xilinx’s next-generation FPGA families are said to enable new, targeted design platforms. Incidentally, Altera, too, decided to launch its Stratix IV GT and Arria II GX FPGAs, the same day as Xilinx.

Back to Dhir’s discussion on the programmable imperative and a changing semiconductor landscape! According to him, the key market trends changing the technology landscape include the empowered consumer, hyper-connectivity and social networking. In this scenario, time-to-market and flexibility are the key attributes for success.

Customer challenges today revolve around doing more with less, and now! Companies now need to monitor their market and competitive leadership, time-to-market and profitable growth, spiraling development cost, and risk aversion and product complexity. Business constraints are now forcing customers to reduce internal R&D investments. The graph shows the IC cost by process nodes.
Time for programmables NOW!
The time for programmables is now! It is an ideal technology to help combat customer challenges. The programmable imperative is driven by factors such as market forces, financial constraints and technology drivers. Really, it all boils down to accelerating the programmable imperative!

Looking back at the logic IC landscape, business dislocation has been underway for the incumbents. From 1998 through 2004, a significant amount of IP migrated from system OEMs to ASSP vendors, particularly in the communications market.

Even ASICs present a bleak outlook and are likely going the way of gate arrays! The graph here shows the declining ASIC market share.
The increasing development costs and reduced R&D investments by OEMs has been leading to accelerated erosion of ASIC market share going forward. In fact, the long-awaited tipping point where FPGAs replace gate arrays is upon us.

ASSP vendor challenges
Looking at ASSP vendors, those vendor in tier 1 face challenges such as business model viability and poor profitability. High risk environment leads to poor customer loyalty. The large capital outlay on fabbed is moving on to fablite and fabless. Next, market and customer consolidation means fewer deals for such vendors. Chase of >1M units means few applications and customers.

What about the tier 2 ASSP vendors challenge? They have been forced into very high volumes and compete poorly against the tier 1 vendors. Hence, profitability and business models are under severe pressure. It is to be noted that out of the 115-odd companies followed by the GSA (Global Semiconductor Alliance), 29 have market caps less than their cash.

As for the tier 3 ASSPs and startups challenge, the Round-A VC funding has dried up! Incidentally, the round-A funding (dollar amount) declined 82 percent from 2000 and 2007. Through Q308, only two chip companies received round-A funding, totaling $12 million.

Programmables next business disruption
Looking at the logic IC landscape, programmables are emerging as the next business disruption. FPGAs are no longer seen as a yearly cost burden prior to ASIC release, but more as a solution that could live in products and platforms over time.

The tipping point should happen in 2009, and programmables should reach a plateau of productivity by 2016!

Where Xilinx fits in!
Today, Xilinx sees growth opportunity ahead, and it is more of a pragmatic reality now! The company understands that new attributes are required to meet the challenges of the future. It lists three attributes to bring about this change:

* Transformation: Market led, semiconductor leader.
* Ushering in the era of targeted design platforms.
* World class, thriving third-party ecosystem.

Transformation is already underway at Xilinx, which is now becoming a market led, semiconductor business leader.

It is ushering in the era of targeted design platforms, which is enabling innovation. A view at the ASIC/ASSP class applications reveals that the positioning has become more market focused. The architecture is more toward market tuned platforms. Xilinx also focuses on low power leadership. Its design methodology has now become open, scalable and hierarchical.

Targeted design platforms also enable customers to do more, and faster, and focus on their differentiation! Xilinx also boasts a world class and thriving third-party ecosystem. The software and IP is scalable, standardized, extensible and collaborative.

Xilinx is striving to accelerate the programmable experience by giving what customers need, and when they need it! Its Virtex and Spartan silicon form the programmable foundation. It offers base targeted design platforms — devices, software, IP, boards, etc. It also offers domain specific platforms, along with domain specific IP and tools, as well as market specific platforms, which are inclusive of market specific reference designs and IP.

According to Dhir, the company is offering innovative technology to address diverse market requirements and to drive programmable logic beyond the tipping point!

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