State of the global EDA industry: Dr. Pradip Dutta, Synopsys
A few weeks ago, I was fortunate enough to be able to speak with Dr. Pradip Dutta Corporate Vice President and Managing Director, and Treasurer, regarding the state of the global EDA industry and in India. What followed was a very interesting conversation, some of which is reproduced here!
Any sign of improvements in EDA?
To start with, the state of the global EDA industry is well known, and it has also seen revenue drops Q-on-Q in the past. Are there any signs of improvement?
According to Dr. Dutta, the last several quarters in the semiconductor industry have been extremely challenging as consumer demand for electronic products has declined with the heavy stress on the global economy.
“While we are starting to see signs of the semiconductor industry rebounding off the bottom with inventory replenishment and an uptick in end demand for key consumer items such as PCs and mobile phones, the environment is expected to remain difficult at least well into next year.
“During this time, the challenge for the semiconductor industry and its suppliers will be to find the next level of efficiency. The good news is that across a broad field of applications, semiconductors are a key enabler to future prosperity. Green solutions, low-cost netbooks, advances in connectivity and evolving products like the Kindle are just a few examples of areas that could help drive future development.
“The long-term ramifications of this scenario on the EDA industry are starting to become visible. More than ever, customers want to get their products out on time, and get it right with high quality.
“In addition to some immediate cost-cutting to respond to the crisis, most semiconductor and design businesses are re-focusing their market strategies, streamlining their operations, de-risking their supplier and partner relationships, and in some cases actively pursuing consolidation opportunities to drive economic efficiency.
“This situation presents as an opportunity for EDA companies to focus on important product developments that can enable leading semiconductor design and manufacturing companies to not only create more advanced devices, but to simultaneously lower risks and cut costs. In today’s economy, companies need to find ways to manage expenses while still investing in the future so they don’t just survive the recession, they emerge from it stronger.”
State of the Indian EDA industry
Obviously, it would be interesting to see how is the Indian EDA industry holding up in these times.
Dr. Dutta said that the Indian EDA industry is a combination of catering to global semiconductor players and addressing the needs of a domestic market that is slowly developing. The global players that operate out of India are rapidly moving up the value chain in terms of owning and architecting the next generation chips. This leads to an enormous opportunity for EDA companies to get associated at the front end of tool decisions.
“As you are aware, the level of technology that is being witnessed in the chips that are getting designed here is absolutely bleeding edge. The EDA companies are therefore paying concomitant attention to robust application support and in-house R&D effort. It has to be a full package here and now to address these kinds of customer requirements.
“Beyond the global players, India is seeing a few, but committed fabless design companies coming up in recent times. In addition to that, the Indian government is showing a lot of interest in country-specific programs, primarily in defense areas that require EDA support.
“We have also recently seen media reports about an “India Chip” being conceived at the central government level for domestic security applications. The ISA is working toward a blueprint for targeting semiconductors into a national agenda and hopefully, many ideas for systems and corresponding chips that will emanate from it to keep EDA companies interested,” he added.
Technology challenges facing EDA
I also prompted Dr. Dutta to touch upon the technology challenges that the EDA industry is currently facing.
He said: “The EDA industry has traditionally addressed challenges in delivering best quality of results and shortest time to market. These challenges are now joined by controlling costs that could spiral out of control without advanced automation.
“The advanced state of semiconductor manufacturing today has exacerbated and expanded these challenges to unprecedented levels. The complexity of chips has grown to 100s of millions of transistors. Just managing data of this size is a challenge!
“Power has emerged as the dominant constraint over the traditional constraints of speed and area. The progression of Moore’s Law has resulted in some deposition layers of only five atoms, and as a result, previously second and third order physical effects must be thoroughly accounted for, along with their interactions. Finally, the tiniest manufacturing variabilities can now have a significant impact on yield, and systemic yield issues must be accounted for in design with a strong tie between design and manufacturing.
“In verification, the cost of fixing a missed bug and the opportunity cost are very high. While verification has long been a bottleneck to getting product development done on time, we have recently seen the verification challenge really expand. Verification used to be about RTL verification and circuit simulation. Today there’s a growing focus on software-to-silicon verification, encompassing a full range of challenges that also includes embedded software, system validation and integration testing.
“On the design side, energy has become a big focus. Scrutiny is being placed on energy consumption at every level, including consumer and industrial electronics. EDA companies preparing for success beyond the downturn are developing end-to-end solutions that can help their semiconductor industry customers optimize designs for low power.
“The combination of increasing IC complexity and shrinking semiconductor features is driving exponential demand for design and manufacturing-related compute resources. IC design companies are looking for ways to easily maximize the throughput of their multi-core compute infrastructure and improve overall time to results. EDA solutions employing advanced parallel, threaded and other optimized compute technologies can help IC design companies boost performance and productivity and accelerate design throughput.
“Today’s IC design landscape is characterized by escalating design challenges on the one hand, and enormous pressure to control costs and speed time-to-market on the other. IC design companies are relying on their EDA vendors to help resolve this dichotomy.”
EDA in areas of modeling and photomask correction
How and where does EDA fit into the big picture, particularly in the areas of modeling and photomask correction? This, I believe is part of Dr. Aart de Geus’ vision.
Dr. Dutta highlighted that nowadays, semiconductor manufacturers face unprecedented challenges in addressing the fast-rising cost and complexity of semiconductor process development and manufacturing.
To fulfill the demand for lower cost and more functional products, successive generations of semiconductor processes are subjected to scaling and integration of heterogeneous device types — such as core logic MOSFETs, embedded Flash memory and high-voltage devices — that require substantial investment in fabrication equipment and wafer experimental trials to meet product requirements.
Moreover, once the new process enters manufacturing, it is critical to achieve high manufacturing yield as rapidly as possible to maximize or even ensure profitability for the products built on the new process.
To help overcome these challenges, semiconductor manufacturers increasingly rely on simulation tools to guide equipment selection and wafer experimentation during process development, allowing them to reduce development cost and time. In addition, they deploy computational lithography and mask synthesis tools in production to improve the resolution of the lithography process.
Accellera-SPIRIT merger and impact on EDA industry
Fairly recently, Accellera and SPIRIT announced a merger. How will this union improve the development of language-based and IP standards.
According to Dr. Dutta, the co-ordination of activities between Accellera and SPIRIT will be more powerful for future standards that should include increased focus on system-level design and verification. Accellera has always focused on language-based standards, while SPIRIT focused on IP usage. Combining the two for system-level design is a big win-win for all ESL users.
“We think that this merger will also spawn new products with consistent interoperability among multiple design paradigms. At Synopsys, we are facilitating interoperability through the recently announced System-Level Catalyst program. We think that the ESL design methodologies will be successful.
“In addition, a certain amount of overlap always exists between independent standards efforts. This merger will help minimize the duplication of certain overheads and facilitate consistent technical discussion between the two efforts.”
In that case, will this union be now able to keep up with the various developments in higher process nodes?
He added that Wwith the migration toward more advanced process nodes, device counts will continue to increase. As a result of this complexity, the cost of managing design and verification will also rise. Therefore, new paradigms that leverage existing methodologies must evolve. Both, language-based and IP-based approaches have been successful so far.
“We expect that the Accellera/SPIRIT merger will create a new generation of standards enabling newer methodologies to deal with these complexities. While it is possible that a revolutionary approach will be developed in the future, it is likely that this evolutionary approach will appeal to most designers because it leverages the existing skill-set and infrastructure.”
You can also read the full interview on ISA’s web site.