EDA360 unplugged with Cadence’s Jaswinder Ahuja
Following the announcement of the EDA360 last week, I managed to get in touch with Jaswinder Ahuja, corporate vice president and managing director, Cadence Design Systems (I) Pvt Ltd. We discussed a variety of topics such as why the EDA industry is at the crossroads, EDA360 unplugged, the integrators vs. creators concept, the IP stack and the road ahead for EDA360.
First, why is the EDA industry at the crossroads?
“Semiconductor companies are being asked by system companies to provide the hardware platform as well as the software that will run on that particular platform. That is the trend that Cadence is seeing today, and that is what is discussed in the EDA360 manifesto,” he added.
EDA is at crossroads because EDA companies can no longer provide the tools only for IP integration and silicon realization like they have been doing all these years. EDA now has to encompass SOC realization (including bare metal software) and then move towards system realization, which includes mechanical/board design, he noted.
EDA360 and its key features
Ahuja said that EDA360 represents System Realization, the development of a complete hardware/software platform ready for applications development; SoC Realization, the creation of a single SoC including hardware-dependent software; and Silicon Realization, which includes complex digital, analog, and mixed-signal designs.
The traditional approach to system development starts with the hardware, and appends the software and the applications later. With application-driven System Realization, designers start by envisioning the applications that will run on the system, define requirements, and then work their way down to hardware and software IP creation and integration. This flow requires some new and expanded capabilities.
Part of system realization is project management. EDA360 reaches beyond engineering teams to help customers meet project and business objectives.
Key features of EDA360 include:
The four chapters of the EDA360 manifesto take a look at:
Integrators vs Creators concept
One of the key points made in the EDA360 is that the EDA industry to date has only served the needs of creators. It has almost completely ignored integrators, who need a different set of tools and capabilities.
Ahuja said that the fundamental manner in which electronic design is being done is now changing. “Systems companies are demanding that their semiconductor suppliers provide not just silicon but application-ready hardware/software platforms. Semiconductor makers, meanwhile, are facing projected SoC development costs of $100 million at 32 nm and below. One result of these pressures is that fewer companies will be design creators and more will become integrators who make heavy use of pre-designed IP, including both hardware and software. It is only a reflection of the evolution of the industry.”
The needs of integrators are different from those of creators. Thus, far EDA has focused almost exclusively on creators. While EDA360 continues to serve creators, it also brings new tools and methodologies to integrators.
He added: “Creators are most concerned about a productivity gap. EDA360 will help close that gap through better design, verification, and implementation approaches. Integrators are more concerned about a lesser-known profitability gap. EDA360 will help close that gap by enabling integration-optimized intellectual property (IP) creation and selection, IP integration into SoCs and systems, and system cost optimization.”
According to him, EDA360 is a comprehensive new vision and call-to-action for the electronics industry to address a disruptive transformation—a shift in focus from design creation to integration. It attempts to define where the industry is going.
Ahuja said: “EDA largely focuses on the design community which, until recently, has been mainly concerned about productivity. The productivity gap was the difference between what could be accomplished and what actually was. To the chip company, that gap was missed opportunity and lost value. Therefore, so far the focus of EDA companies has been on helping design managers address the productivity gap.”
However, because of the growing complexity and integration of designs that we see today, the semiconductor ecosystem now has to address the profitability gap, not just the productivity gap. EDA360 acknowledges the importance of the overall ecosystem, and looks at what are the key drivers that make a company successful. No one company can do it alone. EDA360 requires a collaborative ecosystem including EDA vendors, embedded system providers, IP providers, foundries and customers.
Part of EDA360 is providing new tools that offer a “dashboard” to help companies manage system development projects, and provide metrics that make sense in hardware and software engineering environments. The metric-driven verification capability available now points the way to what needs to be done.
Today, design and verification managers can create an executable verification plan that identifies key project metrics, executes simulation engines, and tracks coverage metrics. They can then review reports and charts that will help them manage a “plan to closure” verification process, and determine when verification is done. As a result, verification resources are used effectively and overall costs are reduced, helping close the profitability gap.
Ahuja said that typically, SoCs are considered to be “done” when the silicon is completed. In the EDA360 view, however, SoC Realization is not complete without software device drivers for each hardware subsystem.
“We believe these drivers should be developed with the SoC rather than tacked on later—and that leads to a completely new view of how silicon IPshould be provided.
“Instead of thinking of IP as isolated “blocks,” we propose an IP stack that includes “bare-metal software” as well as hardware IP. Bare-metal software refers to everything below the OS layer, and the most prominent feature of bare-metal software is device drivers.”
The IP stack depicted here also includes verification IP (VIP) that validates IP functionality and integration. The stack may include hard macros with fixed layouts along with synthesizable IPat the register-transfer level or the transaction-level modeling (TLM) level. It also includes design constraints.
What next step for EDA360?
The EDA360 is an approach that is entirely Cadence’s initiative.
“You will see over the period of time that EDA360 will be backed up by several announcements. Some of them have already been made – for example, the announcements around Palladium XP and the partnership with Wind River. Watch out for more announcements shortly,” Ahuja concluded.