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Xilinx’s ISE Design Suite 12.1 focuses on power, productivity and plug-and-play!

May 24, 2010

Early this month, Xilinx Inc. released the ISE Design Suite 12. I remember, last year, around the end of April, the ISE Design Suite 11 had been released, so this release should surely have some new things to offer, considering that this is among Xilinx’s key milestones this year.

Just for the record, so far, Xilinx’s  notable milestones for this year have been: 28nm architechture supported by clock gating, partial reconfiguration in February 2010, followed by the release of the AMBA 4/AXI-4 specifications in March. And now, the ISE Desgin Suite 12.1, which incidentally, is available from May 3, 2010, onward.

For those who came in late, Xilinx’s ISE Design Suite 11.1 (released a year ago) was said to be the industry’s first FPGA design solution with fully interoperable domain-specific design flows and user-specific configurations for logic, digital signal processing (DSP), embedded processing, and system-level design.

What’s new with ISE Design Suite 12.1?
Now, what’s new in Xilinx’s ISE Desgn Suite 12? Three things — power, productivity and plug-and-play!

Xilinx's ISE Design Suite 12.

Xilinx's ISE Design Suite 12.

Xilinx’s ISE Design Suite 12’s thrust has been on improving the power efficiency (or power reduction), productivity and plug-and-play capability. Let’s take a look at each one of them.

On power, Xilinx claims to have achieved (or made available) 30 percent dynamic power reduction using the innovative automated clock gating technology. On productivity, the ISE Design Suite 12 boasts of improved productivity with design preservation, faster run-time and fourth generation partial reconfiguration. On plug-and-play, the Design Suite 12 allows  plug-and-play FPGA design with AXI-4 compliant IP.

I will try and add some more details on the three aspects, time permitting.

Xilinx has also outlined the next steps in the ISE Design Suite roadmap. These are:

* In May 2010, it has introduced intelligent clock-gating for Virtex-6 and and improved the design preservation

flow for timing predictability in ISE Design Suite 12.1

* In the summer of 2010, Xilinx will offer partial reconfiguration to all users and intelligent clock-gating support for Spartan 6.

* In the fall of 2010, Xilinx drives plug-and-play FPGA design with embedded, DSP and connectivity IP support for AXI4.

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  1. June 26, 2010 at 11:26 am

    I had a few questions for Xilinx, which are as follows:

    1. It is claimed this version is slower than its predecessor. Why?
    2. Lots of older versions of IPCores and drivers are made obsolete. Some of them are removed from the distribution. The alternative new versions for some of the cores are not compatible either. Why so?
    3. It is said that Lots of Spartan3E boards have been removed from the EDK XPS. What happens now?
    4. Is it so that users will have a hard time with migrating their existing designs into new suite?

    Hope to hear from Xilinx soon!

  2. Neeraj Varma
    June 26, 2010 at 11:30 am

    Hi Pradeep,

    Here are the responses.

    1. It is claimed this version is slower than its predecessor. Why?

    Ans: This is not true. This version in-fact runs 2x faster for synthesis and 1.3x faster for implementation and if you use multi-threading, it would run 1.5x faster.

    2. Lots of older versions of IPCores and drivers are made obsolete. Some of them are removed from the distribution. The alternative new versions for some of the cores are not compatible either. Why so?

    Ans: Can the user provide a specific list and the issues he/she is facing so we can address the specific problem through our technical support?

    3. It is said that Lots of Spartan3E boards have been removed from the EDK XPS. What happens now?

    Ans: We would like to know what Spartan-3E boards the user is referring to, so we can have our tech support take a look.

    4. Is it so that users will have a hard time with migrating their existing designs into new suite?

    Ans: In general, this is not true. However, if there are some really old devices and cores used, in order to take advantage of the newer features, some effort may be needed, which is true whenever you migrate from an older technology to a newer one. While we make every effort to make the transition seamless, there could be trade-offs we are forced to make keeping in mind the benefits the newer technology will provide to the users.

    Xilinx has a dedicated technical support centre in India, and the user can call 91-40-6721-4444 to talk to a tech support engineer or open a webcase on support.xilinx.com

    Thanks/Neeraj

  3. June 26, 2010 at 11:33 am

    Thanks a lot, Neeraj! 🙂

    Friends, Neeraj is the country manager for Xilinx India. He’s provided the details of how you can reach Xilinx, in case of technical support.

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