Home > Beceem, EDA, global semiconductor market, Indian semiconductor industry, Semiconductors > Creating commercial IP in academic community

Creating commercial IP in academic community

November 18, 2010

Dr. Rajat Gupta, MD, Beceem.

Dr. Rajat Gupta, MD, Beceem.

“The only community that can develop IP for the next generation is the academia and institutes,” said Dr Rajat Gupta, managing director, Beceem Communications Pvt Ltd, while presenting the guest keynote during the CDNLive India 2010 University Conference.

India is currently an attractive market. Its 50 million+ middle class can well become the preferred target for all product companies in the world.  In this context, what can the academic community do to stimulate product development in India? And, how can they engage in early technology development?

Further, can this large resource pool be mobilized to collaborate to create a massive IP ecosystem that is both commercial and free?

He said: “If there is wide ranging collaboration within the academia, the current duplication that’s happening can go away. This collaboration can also become a vehicle for a different type of industry-academia collaboration.

“Unless we are able to create  a basic ecosystem, we cannot get there. Unfortunately, leading edge work in VLSI does not happen that much in India at the moment. We need to make that happen.”

Understanding layers in IP creation
Gupta enlightened the audience about understanding the multiple layers involved in IP creation. For instance, in foundation IP, standard cell library and I/O library are at the core. Once you start building, people will realize that there are lots of interesting things to learn.

Then you have macro IPs — memories; OSC, PLL, POR, BGR, etc; uP, uC; assemblers, compilers, etc. Again, there are lots of things to learn here as well.  Once the academia started developing macro IPs, industry experts would be willing to help solve problems.

Next, there are methodology IPs — technology (DRC, ERC, EDA, etc); speed, power, variability, handlng; verification, test, qualificaton, validation. I/F (interface) IP involves things such as memory controllers and PHY; USB, MII, SIDO, etc; display, etc. Then, the IP framework itself — which involves legal and licensing + protection, SoC integration, support and IP renewal.

Gupta advised the academia: “If standard cell libraries can be built, they can also be shared among the universities. Colleges can also get togetther and build on and around technologies (methodology IP). The various IP layers need to be addressed. Some things here are catching up, while some others are not.

“You do not have to develop everything to produce a chip as there would be collaborative output. Academia should drive industry, and not be driven by the industry.”

Finally, some framework should also have to be set up (IP framework) for the IPs. Then, the other aspect is integration. Many problems are not solved at the library level. For eg., ESD. Guidelines can also be a part of the framework. Also, if there is a problem, there should be a commitment that the problem should be fixed.

He said: “The academia today is a large resource, but it is transient. There used to be scientific officers in the In IITs (Indian Institute of Technology). These people can act as the continuity folks within such an IP framework. VLSI is in the business of building ‘highways.’ This is that highway. I’ would also create a certain layer of abstraction. It would also create higher level IPs on top of this.”

Collaborative academic community
On the subject of collaboration among the academic community in India, Gupta said that the availability of IP would lower barriers of entry for domain experts.Further, collaborating with domain experts can then stimulate a much higher order IP/product creation. The need for domain experts will also drive the specifications of next gen IP core.

He also provided a possible framework for commercial use of the IP created. First, it could be free for non commercial use. Then, there could be a defined fee structure for commercial use. Within this, there could be a defined pay out across the participating institutes.

Things that could be common to all institutes would inclide multi- and foundry, and EDA selection, as well as renewing the IP independently at each technology node. Having an IP delieverable framework including verification and qualification methodologies, as well as a committment toward IP maintenance, support and protection.

“If you think of commercializing. you can do design differentiation.There should also be some committment to maintain, support and protect the IP. You must figure out for yourselves how you would do that. If you come up with something new, you must learn to protect it — eg., file a patent,” Gupta added.

Collaboration improves pedagogy
According to him, collaboration among the academic institutions would also improve the pedagogy. IP development will continuously provide new insights. That would automatically lead to improved problem solving skills. There would also be a full spectrum of design understanding (variability, yield, ESD, test, etc.), as well as an appreciation of design elegance, symmetry and regularity.

IP renewal would improve the performance parameterization, as well as improve features, and later, technology migration.

Further, new technologies would always need new IPs. These would drive the expertise in the new domains, such as MEMS, nano electronics — semicon NW tech, CNTFET and interconnects, molecular devices. Some other new domains include solid state lighting — currently supposed to be the best technology to work on, as well as organic electronics.

Commercializing community IP
Any commercial product has to be supported over a specified lifetime. There are certain requirements that must be followed in the process of commercializing community IP.

First, your documentation has to be complete. The parameters and functions have to be characterized, and features have to be guaranteed. All defects have to be repaired. The IP itself has to be protected and the licensee indemnified.

Ensuring the quality of a product depends on various factors, such as design robustness — defect density and yield, normal distribution and design centering, and design guardbanding) — and correlation guardband, tester guardband, sampling guard band). the infant mortality (such as burn-in — what is it? High and cold temperature tests, ESD, LU, etc.). Also, the academia will subsequently develop product lifetime estimation,{accelerated life test — what is it?).

Gupta advised about the IMA (Indian Microelectronics Academy), which was put into place some months ago. It can help with foundry access, legal and commercial framework creation, and strategic direction for IP strategy and collaboration methodology.

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  1. VLSI
    November 22, 2010 at 6:34 pm

    Creating IPs by educational institutes, especially by the universities, are a very doable task in India. However, we also need to make sure that the project guides and teachers involved are inclined toward providing serious guidance to students.

    In India, lecturers and professors do not have any motivation to do research as they get promotions and perks based on seniority, rather that how many papers and patents they have.

    The academia needs to be encouraged via a carrot-and-stick method to do take research seriously.

    • November 22, 2010 at 7:01 pm

      Yes, it is imperative that more attention is focused on research — by the academia and also within the Indian industry. I don’t have a magic wand, but let’s see whether something can be done about this. Cheers 😉

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