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Xilinx stays a generation ahead!

April 16, 2013

Tom Feist.

Tom Feist.

Today, the challenge is all about abstraction and putting automation around it. Productivity is automation and abstraction. Tom Feist, senior marketing director, Design Methodology Marketing, Xilinx said that the company’s strategy has been about All Programmable abstractions. He was speaking at the ongoing 13th Global Electronics Summit being held in Santa Cruz, USA.

Today’s hardware design abstractions include accelerated time to integration, abstracting hardware. For IP abstractions, Xilinx has introduced the IP integrator. It enables IP re-use and time to integration. The Vivado uses multiple plug-and-play IP. Vivado IP integrator is co-optimized for platforms and for silicon, respectively.

Vivado IP integrator has features such as correct-by-construction and automated IP systems. Vivado high-level synthesis allows C/C++ abstractions. Xilinx introduced the OpenCV library, accelerating smarter vision. It supports frame-level processing library for PS. It also supports pixel processing interfaces and basic functions for analytics.

Mathworks has model based abstraction. The automatic C and HDL code generation is supported from the same algorithmic level.

Hardware/software partitioning is supported for Zynq-7000 AP SoCs.  There are comprehensive video, motor control and signal processing IP libraries. There are automated workflows targeting Xilinx platforms.

Xilinx is also working with National Instruments. The automated C and HDL code generation is from the same graphical syntax in the LabVIEW IDE. It automatically generates a hardware implementation to meet requirements, abstracting Xilinx tool flow. There is a comprehensive software, hardware and I/O platform for creating control and monitoring systems.

Abstraction evolution has evolved to system level abstraction. It is abstracting all hardware through an increasing layer of automation.

All Programmable realization empowers software and systems engineers. There is a common compilation environment for heterogenous systems. It consumes C, C++ or OpenCL and libraries with user directives. There is automated flow — the user determines the program modules that run on various components.

The Vivado Design Suite 2013 abstractions with IP based design, C, C++, SystemC and OpenCV is new. Mathworks and National Instruments system level design abstractions with new levels of automation is emerging. Xilinx’s vision has been to empower the software and systems engineers by extending abstractions and automation.

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  1. Andres
    April 16, 2013 at 8:37 pm

    If someone needs to be updated with latest technologies afterward he must be go to see this web site and be up to date all the time.

  2. Gary Dare
    April 19, 2013 at 6:12 am

    In addition to NI LabVIEW, another design creation front-end to complement Xilinx Vivado is Space Codesign’s SpaceStudio, where functional specification (algorithm) can be taken to design architecture exploration with hardware/software co-design, retargeting functions in C/C++/SystemC to HW or SW. Then thirdly, to implementation driving Xilinx Vivado including Vivado HLS (formerly AutoESL) down to chip. Space Codesign showed a Rover controller reference design on a Zedboard at ARM TechCon 2012 and this week at EDPS, co-founder and president, Guy Bois, has a calculator Zedboard demo that he can show upon request.

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