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Metro450 Conference 2014 discusses all things 450mm wafers!


Thanks to the Enable450 newsletter, sent out by Malcolm Penn, CEO, Future Horizons, here is a piece on the Metro450 Conference 2014, held earlier this year in Israel.

450Metro450 is an Israel-based consortium with the goal of helping the metrology companies advance in their fields. The consortium’s members include metrology and related companies, as well as academics who support these companies by performing basic research.

The conference was sponsored by the Israeli Chief Scientist Office, by Applied Materials Israel and by Intel. There were several goals for the conference: to provide an opportunity for industry leaders as well as academicians to meet and discuss the latest developments in the world of metrology, to present these advances to audiences which would normally not be privy to such information, and to learn more about the international effort in 450mm wafer technology.

Over 200 people attended this conference from Israeli companies and academia, as well as from Europe and the United States. Israeli companies included Applied Materials, Jordan Valley, Nova, KLA, Zeiss Israel, and others. Academic members included researchers from the leading Israeli universities, including the Technion, Tel-Aviv U. and Haifa U. European companies were represented by ENIAC, as well as large corporations such as ASML as well SME-based companies. The G450C consortium, based in Albany, N.Y. was also well represented at this conference.

Some of the highlights of the conference included scientific discussions of different metrology methods, and their adjunct requirements, such as improved rapid wafer movement, improved sampling methods and fast computing. Presentations also included an overview of the advances necessary to move the industry forward, optical CD metrology, x-ray metrology, and novel piezo-based wafer movement.

A panel discussed various broad industry trends, including the timeline of 450mm wafers, European programs and the Israeli programs. International speakers discussed the European technology model, risk mitigation of 450 through collaborations, 450 collaborative projects under ENIAC, 450mm wafer movement challenges and metrology challenges beyond 14nm.

This second annual Metro450 conference took place this January at the Technion, Israel.

SEMICON Europa 2013: Where does Europe stand in 450mm path?

November 1, 2013 Comments off

SEMICON Europa was recently held in Dresden, Germany on Oct. 8-10, 2013. I am extremely grateful to Malcolm Penn, chairman and CEO, Future Horizons for sharing this information with me.

Semicon Europa 2013SEMICON Europa included a supplier exhibition where quite a few 450mm wafers were on display. One highlight was a working 450mm FOUP load/unload mechanism, albeit from a Japanese manufacturer. These exhibits did illustrate though that 450mm is for real and no longer a paper exercise.  There was also a day-long conference dedicated to 450mm in the largest room. This was crowded throughout the time and a large number of papers were given.

Paul Farrar of G450C began with a presentation about Supply Chain Collaboration for 450mm. His key message was there are 25 different tools delivered to G450C of which 15 are installed in the NFN cleanroom. This number will grow to 42 onsite and 19 offsite by Q1 2015.

He stated that Nikon aims to have a working 193i litho machine in 2H 2014 and install one in Albany in 1H 2015. Farrar also reported a great improvement in wafer quality which now exceed the expected M76 specification, and prime wafers to the M1 spec should be available in Q3 2014. There has also been good progress on wafer reclaim and it is hoped some wafers can be reused up to 10 times, although at least three is the target.

Metrology seems to be one of the most advanced areas with eight different machines already operational. The number of 450mm wafers in their inventory now stands at over 10,000 with these moving between the partners more rapidly. It was immediately noticeable from Farrar’s speech that G450C is now recognising the major contribution Europe is making to 450mm and is looking for more collaborations.

Facilities part of F450C
Peter Csatary of M&W then dealt with the facilities part of G450C, known as F450C. This group consists of:
• M&W (co-ordination)
• Edwards
• Swagelok
• Mega Fluid Systems
• Ovivo
• CH2MHILL
• Haws Corp.
• Air Liquide
• Ceres Technlogies
• CS Clean Systems

F450C is seen as streamlining communications with the semiconductor companies and their process tool suppliers. The group will focus on four key areas, namely Environmental Footprint, Facility Interface Requirements, Cost and Duration, and Safety and Sustainability.

One interesting point raised was that 450mm equipment is inherently more massive and one suggestion has been that ceiling mounted cranes will be required to install and remove equipment. This of course means that fab roofs would need to be stronger than previously. This topic was discussed at the latest F450C meeting subsequent to this conference.

Another new concept is that of a few standardised 3D templates and adapter plates to allow fab services to be pre-installed before the equipment is placed. An interesting point made elsewhere by M&W is that the current preference is to place a fab where there are already other fabs in existence so that the infrastructure to transport products, materials and services is already in place, as are basic utilities such as power, natural gas and water supply.

However, the scale of the expected utility demand at 450 mm ups the stakes as for example a large 300 mm facility uses about 4 million gallons of water per day, whereas a 450 mm fab will use almost double that, putting immense strain on a location’s infrastructure should there be other fabs in the region. This could affect future site selections.

An outcome of this phenomenon is that the reduction, reclaim and re-use of materials will no longer be driven only by the desire to be a good corporate citizen, but will also be driven by cost control and to ensure availability of required resources such as power, water, specialty gases and chemicals.
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What’s happening with 450mm: G450C update and status

August 16, 2013 Comments off

450mm fab.

450mm fab.

The Global 450mm Consortium (G450C) has been driving the effective industry 450mm development. It is co-ordinating test wafer capability supporting development and demonstrating unit process tool performance. The focus is now on improving tools with suppliers to be ready for customer operations.

Giving an update during the recently held Semicon West 2013 at San Francisco, USA, Paul Ferrer, GM, G450C, said that if one looks at the G450C lithography tool roadmap, by 1H-2014, the 300mm coupon, 450mm directed self-assembly and 450mm imprint will be completed. From 2H-2014 to 1H-2015, there will be 193i patterning service at Nikon’s site. Nikon 193i move-in will take place from 1H-2015 to 2H-2016.

Suppliers are developing the 450mm tool set with 10 tools per quarter being delivered to G450C, the global consortium for 450mm fabs. Significant progress has been made in wafer quality and wafer reclaim is almost ready. Automation and carriers are working, and suppliers are co-operating on the key initiatives. Global collaboration is said to be picking up steam.

In the NFX cleanroom, the 450mm OHT is ready for inter-fab transfer. There are nine tools in-fab — two metro, three process, and four stocker, respectively. There will be seven ODD 3Q2013, and 10 tools ODD 4Q2013, respectively.

As for 450mm notchless wafer activities, the key technical results include the backside fiducial marks that have achieved the desired accuracy (3σ = 0.5μm) using existing camera technology. There are design rules of fiducial marks, such as multiple locations (≤ 4) for robustness and speed, different patterns at multiple locations, and off crystal plane, fewer dots and shallower dots to minimize the Si crystal damage.

As for program highlights, there are collected designs from G450C member companies, tool suppliers, and optical detection suppliers. Also, there has been delivery of 300mm test wafers with fiducial marks. G450C has co-ordinated test wafer plans with suppliers. Further, for 450mm silicon wafer readiness, notchless wafers are technically achievable now.

The G450C members include CNSE/Research Foundation, GLOBALFOUNDRIES, Intel, IBM, Samsung and TSMC.

EC’s goal: Reach 20 percent share in chip manufacturing by 2020!


The European Commission is said to have a goal: to reach 20 percent world-share in chip manufacturing by 2020! Heinz Kundert, president, SEMI Europe, has even laid out an industrial strategy that will cover three complementary lines, such as:

* Transition to 450mm, expected to primarily benefit equipment and material manufacturers in Europe.
* “More than Moore” on 200mm and 300 mm.
* “More Moore” for ultimate miniaturization on 300mm wafers.

Investment will be focusing on Europe’s clusters of excellence in manufacturing and design — Grenoble, Dresden and Eindhoven-Leuven — and support partnerships and alliances across the value chain in Europe.

The key question of why Europe needs 450mm wafers has been answered by Mike Bryant of Future Horizons. The European semiconductor industry’s vision is to recover a leading position in the world throughout the entire value chain and to reverse the current negative trend of its worldwide competitiveness.

Among the many strategies the EC is planning to adopt include:

* Benefit from a single explicit European semiconductor industry policy.
* Maintain a high level of R&D effort, in a balanced way between the 150/200/300/450mm fields, between “More Moore” and “More than Moore”.
* Strengthen all elements of the value chain, from design to application.
* Develop co-operating programs and synergy initiatives between all semiconductor actors operating in Europe.

Europe has always stressed on stronger co-operation among the other industry segments. Some of these are automotive, energy, healthcare and well-being, security and safety, etc.

Why do we need 450mm wafers?

April 30, 2013 Comments off

Here is a view from Mike Bryant of Future Horizons, taken from the Enable450 newsletter, for which, I must thank Malcolm Penn, chairman and CEO.

This is a question often asked by journalists and others not directly involved in 450mm technology, and indeed was one of the questions that formed the basis of the SMART 2010/062 report Future Horizons produced for the European Commission.

Mike Bryant.

Mike Bryant.

It is also a question every new 450mm project has to answer in its funding request to the European Commission, and whilst working on the Bridge450 submission we realised the arguments have become rather unclear over time. The following gives some insight and clarity into the question.

In 1970, Gordon Moore re-formulated predictions on computer storage by Turing and others into a simple statement that the number of transistors per unit area of an IC will double every two years for at least the next ten years. This became known as “Moore’s Law” and apart from the occasional hiccup has in fact been followed for the past forty years. Note that Moore never suggested a doubling in density every 18 months, this time period coming from a different statement concerning transistor performance.

Of course, doubling the number of transistors would not be that helpful if the price per unit area also doubled. The semiconductor industry has thus strived to maintain the cost of manufacturing per unit area at a constant price, and analysed over time has done a remarkable job in maintaining this number such that the ASP of logic devices has sat at around $9 per square centimetre for this whole period during which the cost of everything else including the equipment, materials and labour used to make the IC have increased, labour costs in particular increasing by a factor of around five times.

The actual cost of processing a wafer appreciates by around 6 percent per annum due to technology cycle upgrades and insertions, for example in the past the replacement of aluminium interconnects with copper or more recently the move to double patterning for lithography of critical layers. Several approaches have been used to maintain a constant area cost, these being:

Improvements in yield – this obviously reduces wastage and vast improvements have been made in this field though yields are now so good that the problem is more maintaining these levels with each new process node rather than improving them further.

Increasing levels of automation – this is still an area undergoing improvement but again we have entered an area of diminishing returns on the investment required.

Introducing larger wafer sizes – this has been performed on an irregular basis over the history of the semiconductor industry. The increase in surface area reduces many but not all of the processing costs whilst material costs tend to stay fairly constant per unit area. Thus at the 300mm transition the increase in area by 2.25 times gave a cost per unit area reduction of 30 percent, approximately compensating for the increased processing costs acquired over the 90nm and 65nm nodes.
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Round-up 2012: Best of electronics, semiconductors and solar

December 31, 2012 2 comments

Friends, here is the round-up of 2012, where the best of electronics, semiconductors and solar PV are presented. Best wishes for a very happy and prosperous new year! 🙂

Also, a word on the horrendous Delhi rape that has shaken up India. I am ashamed to be a man and a part of India’s society. My family and I are extremely sorry that the brave girl is no more! May her soul rest in peace. May God deliver justice, and quickly!

DECEMBER 2012
Opportunities in turbulent PV equipment market

Global semiconductor industry outlook 2013: Jaswinder Ahuja, Cadence

Next wave of design challenges, and future growth of EDA: Dr. Wally Rhines

Global medical image sensors market to grow 64 percent by 2017

Status of power semiconductor devices industry

NOVEMBER 2012
Global solar PV industry to remain under pressure in 2013!

Dr. Wally Rhines on global semiconductor industry outlook 2013

Focus on monolithic 3D-ICs paradigm shift for semicon industry

Xilinx announces 20nm portfolio strategy

Elliptic intros world’s first commercial touchless gesturing technology!

Global semiconductor industry outlook 2013: Analog Devices

IMEC’s 450mm R&D initiative for nanoelectronics ecosystem

OCTOBER 2012
III-V high mobility semiconductors for advanced CMOS apps

Yet another electronics policy for India?

IEF 2012: Turning recession into opportunity!

Global semicon sales to drop 1.7 percent in 2012?

Virtual prototyping ready for masses

MEMS to be $21 billion market by 2017: Yole

TSMC on 450mm transition: Lithography key!

SEPTEMBER 2012
Cadence Allegro 16.6 accelerates timing closure

Dr. Wally Rhines on global EDA industry

Solarcon India 2012: Solar industry in third wave!

AUGUST 2012
Apple wins big vs. Samsung in patent war!

Can being fabless and M-SIPS take India to top?

JULY 2012
Is Europe ready for 450mm fabs?

APRIL 2012
Xilinx intros Vivado Design Suite

MARCH 2012
Cadence releases latest Encounter RTL-to-GDSII flow

WLCSP market and industrial trends

FEBRUARY 2012
Top 10 semiconductor growth drivers: Intersil

Ingredients for successful fabless Indian semiconductor industry: Dr. Wally Rhines

Tariffs will slow growth in domestic demand for PV systems: The Brattle Group

Wireless leads in global semicon spends!

JANUARY 2012
India to allow imports of low-priced Chinese solar cells? Or, is it beaten?

TSMC on 450mm transition: Lithography key!

October 3, 2012 1 comment

Dr. C.S. Yoo, TSMC.

Dr. C.S. Yoo, TSMC.

TSMC unveiled its schedule for 450mm mass production at the recently held SEMICON Taiwan 2012 450mm Supply Chain Forum. Focusing on lithography as the key, Dr. C.S. Yoo, senior director of the 450mm program at TSMC, noted that IC makers and equipment suppliers should fully leverage the G450C. They need to work and innovate to make the 450mm transition a great success.

TSMC has always been in the relentless pursuit of technology innovation. It has been part of all of the computing waves that have driven the market growth. Right now, mobile computing is the leading market driver. TSMC has been helping the industry produce comprehensive, powerful mobile computing devices.

The future growth drivers and trends include mobile computing, cloud computing and smart devices. However, technical and economic challenges also lie ahead. TSMC has been pushing the lithography roadmap. 28nm is said to be the limit of conventional single-patterning lithography. TSMC has innovations to extend immersion to 20nm. The next-generation lithography (NGL) is being preferred beyond 20nm. Also, EUV and multiple-e-beam concept and feasibility has been proven. The more than 10x throughput gap requires collaborative innovation and funding.

TSMC continues to invest in R&D for transistor architecture trends. There is increasing technology complexity, as reflected by mask layers increase. The technology shrink also leads to design complexity.

There are challenges such as intrinsic wafer cost parity and uncertain technology migration ROI. TSMC’s mission is to be the trusted technology and capacity provider for the global logic IC industry for years to come. TSMC already has capacity leadership. TSMC’s total 12″ cleanroom space will equal more than 32 World Cup football fields by the end of this year..

TSMC customers’ expectations include the offer of leading-edge technology, continue to expand capacity, enable faster time to market, faster technology ramp up, faster manufacturing cycle times, and lower cost /die. To bridge the cost and productivity gap, TSMC no longer maintains cost/transistor trend by 2018 due to the slowing pace of technology shrink, and increasing technology complexity.
Read more…

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