Archive for the ‘Brent Przybus’ Category

Xilinx Base Targeted Design Platform helps save months of development!

July 6, 2009 Comments off

Last week, Xilinx discussed its Targeted Design Platforms, aimed at accelerating the development of system-on-chip (SoC) solutions with Xilinx Virtex-6 and Spartan-6 FPGAs.

I was in conversation with Brent Przybus, Director of Product Marketing, as well as Neeraj Varma, Country Manager, Sales, for India and Australia and New Zealand.

First up, the ISE Design Suite 11.2 is now available for download, with full public support for Virtex-6 and Spartan-6 FPGA families. Xilinx also introduced the Spartan-6 and Virtex-6 base evaluation kits, which can be order immediately by customers.

Since this is the ISE Design Suite 11.2, Przybus added that prior to June 24, support for the Virtex-6 and Spartan-6 FPGA families was available only to early access customers.

Accelerating development of SoC solutions
Next, the Base Targeted Design Platform is said to accelerate the development of SoC solutions. According to Przybus, the Base Targeted Design Platform provides a framework that customers can extend to build their SoC solutions.

“We are providing the common functions including host interface and external memory controller as well as multi-boot in a system configuration. Customers can leverage this code saving weeks of months of development.”

Why now?
The obvious question, why this release now, and not earlier? According to Varma: “Xilinx has always had boards, silicon, tools, IP and reference designs. However, with changes in market conditions and customer needs evolving, what became abundantly clear in recent years is that we need a more formalized and efficient way of providing a base for customers to build upon. Customers have also been asking for more complete design solutions.”

The concept for Base Targeted Design Platform was introduced in February when Xilinx had announced the architectural details of Spartan-6 and Virtex-6 FPGA devices along with the entire targeted design platform strategy.

“When the announcement was made, we had early access customers designing with Spartan-6 and Virtex-6 FPGAs. With the release of the ISE Design Suite 11.2, we are opening up public access to the two new device families. By doing so, we are opening up access through software of all our new devices, we are also making technical documentation, user guides and other resources available to all customers,” he added.

The release of the Base Targeted Design Platform is coincidental to the public availability of software supporting both Virtex-6 and Spartan-6 FPGAs.

The new Virtex-6 FPGA and Spartan-6 FPGA Evaluation Kits are the first in a series of kits that Xilinx will offer throughout the year designed to simplify the evaluation and development of SoCs with the latest generation of programmable technologies from Xilinx.

Now that the first kits have been released, let us probe into Xilinx’s plan for evaluation kits that it will offer throughout the year.

Varma added: “According to our Targeted Design Platform strategy, we have introduced the first level of our offerings. Moving forward, throughout the year we will introduce the Domain Specific Platform and then the Market Specific Platform. The Domain Kits will incorporate embedded kits, connectivity kits, and finally the DSP kits for both Virtex-6 and Spartan-6.” This point should be noted with great care by designers as lots more is in the offing from Xilinx.

The Market Specific Platform will address specific markets and include Communication, Video and Broadcast Kits, Market specific IP, custom tools and custom boards, added Varma.

Spartan-6 SP601 evaluation kit
Xilinx also introduced the Spartan-6 SP601 evaluation kit. Brent Przybus highlighted that the Spartan-6 SP601 evaluation kit is designed to address customers developing high volume, lower cost applications.

He elaborated: “The kit features the Spartan-6 LX16 FPGA and ships with a full base reference design and interface software providing customers a host communications link, built-in memory controller core that interfaces to DDR2 DRAM on the SP601 board, support for multi-boot, and a processing block that enables customers to see and measure the benefits of using a hard IP vs. Logic only simple processing function.

Addressing defense, aerospace apps
How useful will be all of this for defense and aerospace applications? According to Neeraj Varma, a lot of aerospace and defense applications require high performance digital signal processing (DSP), for example, in their video processing, secure communications, wireless communications (software defined radio or SDR), etc.

“Using the Base Targeted Design PLtatform as shown in the demonstration video, designers will be able to evaluate tradeoffs in performance, precision, and power consumption using hard DSP slices available in Spartan-6 and Virtex-6 FPGAs,” he said.

Using the DSP slices in Spartan-6 will help designers boost their performance by five times with higher precision without resulting into the increase of overall power consumption.

Varma added: “The Base Targeted Platform that we have announced will help our customers tune their applications not only in the aerospace and defence applications, but can be used for other applications in different vertical markets as well. Through this year, we will introduce Domain Specific Kits followed by Market Specific Kits. The Market Specific Platform will further address the specific defense applications in future.”

Lastly, there has been a lot of focus on design re-engineering and design security.

Przybus pointed out that the specific reference design shown in the Xilinx demo video has been done in HDL and doesn’t include and design security.

“The base reference design is portable and can be extended in a number of ways. The customer could use the built-in features like DeviceDNA, AES encryption of bitstream, etc. in our Virtex-6 and Spartan-6 silicon to secure their designs,” he noted.

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