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Semicon West 2014: SEMI World Fab forecast report

July 14, 2014 Comments off

Fabs

Fabs

Christian Gregor Dieseldorff, senior analyst, Industry Research & Statistics  Group at SEMI, presented the SEMI World Fab Forecast at the recently held Semicon West 2014, as part of the SEMI/Gartner Market Symposium on July 7.

Scenarios of fab equipment spending over time has been  20-25 percent in 2014, and 10-15 percent in 2015. At this time, worldwide fab equipment spending is about same in 1H14 vs 2H14. As for fab construction projects, 2013 was a record year with over $9 billion.

New fabs: construction spending (front end cleanrooms only!)
2013: record year with over $9 billion.
2014: -22 percent to -27 percent (~$6.6 billion)
2015: -22 percent to -30 percent (~$5 billion +/-).

Fab equipment spending front end (new and used)
2014: 20 percent to 25 percent (~$35 billion to $36 billion) – if $35 billion, then third largest on record.
2015: 10 percent to 15 percent (~$40 billion) – if $40 billion, then largest in record.

Installed capacity for front end fabs (without discretes)
2014: 2 to 3 percent
2015: 3 to 4 percent
Future outlook beyond 2015: less than 4 percent.

SEMI World Fab Forecast report status and activity outlined that there were 1,148 front end facilities (R&D to HVM) active and future. Also,
* There are 507 companies (R&D to HVM).
* Including 249 LEDs and Opto facilities active and future.
* There are 60 future facilities starting HVM in 2014 or later.
* Major investments (construction projects and/or equipping): 202 facilities in 2014, 189 facilities in 2015.

A slow down of fab closures is expected from 2015 to 2018 for 200mm fabs and 150mm fabs.

Now, India to have two semicon fabs!

September 12, 2013 10 comments

Finally, the Government of India has approved the establishment of a semiconductor wafer fab (fab) in India!

This is indeed heart warming news, especially for the Indian semiconductor and electronics industries. For years, India has been trying to get at least one fab up and running! Now, the dream is about to be realized!

Speaking from China, an ecstatic BV Naidu, chairman and managing director, Sagitaur Ventures, co-chairman, Karnataka ICT Grioup and former president, India Semiconductor Association (ISA) said: “This is really a fantastic news for the Indian semiconductor industry. The government has been trying to achieve this since 2008. The announcement goes as a strong signal to global community.”

Pradip Dutta, corporate VP and MD, Synopsys, said: “It is a momentous decision for the semiconductor industry and by extension the electronics industry for our country. It should lead to a level playing field for the local manufacturers and mitigate some of the disability factors. I sincerely hope the industry reacts positively to this news and this leads to a vibrant local IC design industry.”

Raghu Panicker, sales director, Mentor Graphics India, added: “For years, India has been trying to get at least one fab up and running! This has indeed been a long awaited news. Finally its not ONE, but TWO. The fabs would fuel the growth of semicon start up’s and electronics industry as a whole. It is a big step forward for the overall ESDM inititaive by IESA and government.”

Jaypee Group, IBM and Tower form one consortium. HSMC, STMicroelectronics and a Malaysian company are said to be part of the other consortium.

IMEC’s 450mm R&D initiative for nanoelectronics ecosystem

November 1, 2012 Comments off

Roger de Keersmaecker, IMEC, Belgium, presented on IMEC’s 450mm R&D initiative in support of the nanoelectronics ecosystem at the Semicon Europa event in Dresden, Germany. IMEC has prepared an integrated 450mm R&D initiative. This will present an innovation engine supporting the global nanoelectronics ecosystem.

IMEC will play a key role in the acceleration of 450mm equipment development by timely installation of alpha/beta-demo tools for early learning, in an industry-relevant technology flow and ensuring patterning capability by early 2016. The 450mm R&D pilot line will enable full 450mm process capability for advanced nodes by early 2017.

Source: IMEC, Belgium.

Source: IMEC, Belgium.

Scaling
Logic device scaling slows down and ‘interim’ nodes are likely to be introduced. Disruptive devices are needed beyond 10nm. NAND flash is migrating from 2D floating gate to 3D SONOS device architecture.

Emerging memories are being introduced at 1x nm node. The parallel system scaling path done using 3D TSV technology is established and slowly gaining in momentum. Die cost is also exploding. There is an increasing need for an innovation pipeline, early design/technology co-optimization and cost reduction.

IMEC announced the opening of 300mm CR expansion on June 8, 2010. The cleanroom expansion is 450mm ready. There is 1,200m2 extra clean room space, and ready for EUV. Fab 1 is a 200mm pilot line and 5200 m2 CR (1750 m2 Class 1), with 24/7 continuous operation. Fab 2 is a 300mm pilot line with ball room, clean sub-fab, and 3200 m2 + 1200 m2 CR, also in 24/7 continuous operation.

IMEC started engineering new 450mm clean room in 2012. It has plans to stat constructing the clean room in 2013 and complete by 2015. The Flemish Minister of Innovation, Ingrid Lieten, announced to invest in the building of imec’s 450mm clean room facilities.

With the combination of a state-of-the-art 300mm clean room and the transition to 450mm, imec will be able to keep on delivering its partners topnotch research on (sub)-10nm devices enabling the future growth of the global nanoelectronics industry.
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