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IEF 2013: New markets and opportunities in sub-20nm era!

October 15, 2013 1 comment

Future Horizons hosted the 22nd Annual International Electronics Forum, in association with IDA Ireland, on Oct. 2-4, 2013, at Dublin, Blanchardstown, Ireland. The forum was titled ‘New Markets and Opportunities in the Sub-20nm Era: Business as Usual OR It’s Different This Time.” Here are excerpts from some of the sessions. Those desirous of finding out much more should contact Malcolm Penn, CEO, Future Horizons.

Liam BritnellLiam Britnell, European manager and Research Scientist, Bluestone Global Tech (BGT) Materials spoke on Beyond Graphene: Heterostructures and Other Two-Dimensional Materials.

The global interest in graphene research has facilitated our understanding of this rather unique material. However, the transition from the laboratory to factory has hit some challenging obstacles. In this talk I will review the current state of graphene research, focusing on the techniques which allow large scale production.

I will then discuss various aspects of our research which is based on more complex structures beyond graphene. Firstly, hexagonal boron nitride can be used as a thin dielectric material where electrons can tunnel through. Secondly, graphene-boron nitride stacks can be used as tunnelling transistor devices with promising characteristics. The same devices show interesting physics, for example, negative differential conductivity can be found at higher biases. Finally, graphene stacked with thin semiconducting layers which show promising results in photodetection.

I will conclude by speculating the fields where graphene may realistically find applications and discuss the role of the National Graphene Institute in commercializing graphene.

Jean-Rene Lequepeys, VP Silicon Components, CEA-Leti, spoke on  Advanced Semiconductor Technologies Enabling High-Performance Jean-Rene Lequepeysand Energy Efficient Computing.

The key challenge for future high-end computing chips is energy efficiency in addition to traditional challenges such as yield/cost, static power, data transfer. In 2020, in order to maintain at an acceptable level the overall power consumption of all the computing systems, a gain in term of power efficiency of 1000 will be required.

To reach this objective, we need to work not only at process and technology level, but to propose disruptive multi-processor SoC architecture and to make some major evolutions on software and on the development of
applications. Some key semiconductor technologies will definitely play a key role such as: low power CMOS technologies, 3D stacking, silicon photonics and embedded non-volatile memory.

To reach this goal, the involvement of semiconductor industries will be necessary and a new ecosystem has to be put in place for establishing stronger partnerships between the semiconductor industry (IDM, foundry), IP provider, EDA provider, design house, systems and software industries.

Andile NgcabaAndile Ngcaba, CEO, Convergence Partners, spoke on Semiconductor’s Power and Africa – An African Perspective.

This presentation looks at the development of the semiconductor and electronics industries from an African perspective, both globally and in Africa. Understanding the challenges that are associated with the wide scale adoption of new electronics in the African continent.

Electronics have taken over the world, and it is unthinkable in today’s modern life to operate without utilising some form of electronics on a daily basis. Similarly, in Africa the development and adoption of electronics and utilisation of semiconductors have grown exponentially. This growth on the African continent was due to the rapid uptake of mobile communications. However, this has placed in stark relief the challenges facing increased adoption of electronics in Africa, namely power consumption.

This background is central to the thesis that the industry needs to look at addressing the twin challenges of low powered and low cost devices. In Africa there are limits to the ability to frequently and consistently charge or keep electronics connected to a reliable electricity grid. Therefore, the current advances in electronics has resulted in the power industry being the biggest beneficiary of the growth in the adoption of electronics.

What needs to be done is for the industry to support and foster research on this subject in Africa, working as a global community. The challenge is creating electronics that meet these cost and power challenges. Importantly, the solution needs to be driven by the semiconductor industry not the power industry. Focus is to be placed on operating in an off-grid environment and building sustainable solutions to the continued challenge of the absence of reliable and available power.

It is my contention that Africa, as it has done with the mobile communications industry and adoption of LED lighting, will leapfrog in terms of developing and adopting low powered and cost effective electronics.

Jo De Boeck, senior VP and CTO, IMEC, discussed Game-Changing Technology Roadmaps For Lifescience. Jo De Boeck

Personalized, preventive, predictive and participatory healthcare is on the horizon. Many nano-electronics research groups have entered the quest for more efficient health care in their mission statement. Electronic systems are proposed to assist in ambulatory monitoring of socalled ‘markers’ for wellness and health.

New life science tools deliver the prospect of personal diagnostics and therapy in e.g., the cardiac, neurological and oncology field. Early diagnose, detailed and fast screening technology and companioning devices to deliver the evidence of therapy effectiveness could indeed stir a – desperately needed – healthcare revolution. This talk addresses the exciting trends in ‘PPPP’ health care and relates them to an innovation roadmap in process technology, electronic circuits and system concepts.
Read more…

Boom turned to bust? Chip industry’s future!

March 1, 2011 Comments off

Malcolm Penn, Future Horizons.

Malcolm Penn, Future Horizons.

Malcolm Penn, chairman and CEO, Future Horizons, asked the question at the SEMI ISS2011 Europe event at Grenoble, France, early this week: Whether this is the time to rethink the industry assumptions?

For instance, fabs have no strategic value, until you haven’t got one and lost control of your business. ASPs will keep on falling, just like house prices kept on rising? The semicon industry growth rate has slowed to ‘7 percent per annum, which is only possible if ASPs keep falling 4 percent given an 11 percent unit growth.

Foundry wafers will always be cheap and freely available, just like cheap debt, right? Multiple sources will keep the foundries ‘honest’, since it is assumed that multi-sourcing at 20/22nm is going to be ‘interesting‘. It is also OK to focus on more than Moore competence, as today’s ‘More Moore’ is tomorrow’s ‘More Than Moore’.

Industry fundamental #1 – Economy: This was NOT a recession, someone turned off the lightsPre-Lehman, the chip industry was in very good shape. There was strong unit demand, and no excess inventory.There was limited wafer fab capacity, and no overspend/cutting back. Next, the ASPs were recovering, although, structurally driven. However, the strong global world economy was being deliberately slowed. The money really stopped moving in the post-Lehmann crash!

The economic coupling Is statistically weak. The economy is just one part of the equation. The chip industry marches to its own drum as well.

Industry fundamental #2: Unit demand: The Moore’s Law giveth and taketh away! Long-term average ICs/wafers grow only very slowly. There are more complex ICs counter balance die shrinks (1-2 percent productivity gain). Besides, 9-10 percent new capacity is needed to match the 11 percent average IC unit growth.

Industrial fundamental #3: Fab capacity: Let’s look at the IC manufacturing fundamentals — four quarter minimum lag from decision to impact.
* Total equipment capex = 85 percent of the total capex
* Wafer fab capex = 70 percent total equipment capex
* Order today = Wafer fab capex one quarter later* Wafer fab capex = Additional capacity two quarters later
* Additional capacity = IC units out one quarter later.

Pig cycles and cobwebs will keep happening due to long supply-side lead times (4 Months – production / 2 Years – fabs / 5+ years – design).

The fab capacity is still seriously tight. The Q4-10 status is still down 7.5 percent vs. Q3-08 peak. Also, the first relief happened in Q4-10 (from Q3/Q4-09’s spend) following six flat quarters.

The IC wafer fab capacity for Q3/Q4-09 spend, was equal to +80k ws/w In Q4-10. The 2010 spend was equal to ~400k ws/w additional by Q4-11? The wafer fab capex is still running ‘fab tight!’ Here are some more pointers:
* Not yet overheating, despite 140 percent 2010 growth.
* 2010 spend same as 2006; 10 percent lower than 2007 and 80 percent of 2000’s all time peak.
* Q1-11 book to bill <1; slowing Q2-11 sales.
* 2011 up between 5-15 percent, still within ‘safe haven’ region.
* TSMC thunders on with capex up 30 percent sales up 22 percent; the leadership gap up. Read more…

Is the Indian semicon industry losing the plot?

December 6, 2010 Comments off

Every time I see a new electronics or related segment being talked about in India — be it medical electronics/healthcare, RFID and smart cards, or for that matter, telecom, why do I get this feeling that the Indian semicon industry is slowly losing the plot? One hopes not!

The Indian technology industry is talking about practically everything, except semiconductors. Yes, I know we have a great pool of designers who work in the MNCs. Also, there are plenty of Indian design services companies doing excellent work (for others?). India’s strength in embedded is folk lore. Despite all of this, we are, where we were a few years ago!

Back in 2007, I’d done a story on how there were very remote chances of having a fab in India. Back then, some industry folks expressed  optimism that the fab story was not dead! However, that story is well and truly dead and buried, as of now! Today, no one wants to talk about a fab — fine, then!

Let’s do a reality check on India’s semiconductor score-card!

So far, India has not even managed to have a small foundry, forget about having a fab! Nor has the Indian industry managed to develop, nurture and build many (or any?) fabless companies of note. Can you tell me how many Indian fabless semicon companies have come up in the past five years? How many globally known Indian semicon product start-ups are there in our country for that matter? Okay, how many Indian semicon product start-ups are there in our country?

For that matter, how many ATMP units have come up in India? I do recall some industry folks mention in the past that there will be some ATMP units happening. Where are they? Okay, who, in India, is even trying to develop IP libraries?

Even if there is some success in building electronic product companes — that is and will be limited success! Neither is there any evidence of cutting-edge R&D being done in India. Please do not mix this up with the work being done by the Indian arms of the various MNCs.

Why, I don’t even think that the industry-academia partnership has developed substantially, leave alone mature!

If medical electronics, or some other related area, were to go on and succeed in the near future, it would be counted as a success for the Indian electronics industry, and not for the Indian semicon industry! Even if this did happen and it was counted as a ‘semicon success, can anyone make a guess as to how many of the chips going into such devices would be actually made in India – by Indian firms?

I had mentioned back in Feb. 2009  that “Can the Indian semicon industry dream big? (And even buy Qimonda?)! To refresh your memory, there was a large 300mm fab up for sale in Dresden, Germany. Well, even that never happened, or well, the Indian industry did not think it to be of much importance!

Back in August 2009, there was news about Texas Instruments (TI) placing a bid of $172.5 million for buying Qimonda’s 300mm production tools from its closed DRAM fab. While this highlighted TI’s focus on building the world’s first 300mm analog fab, I can’t stop wondering: what would have happened had an Indian investor actually bought Qimonda’s fab!

Perhaps, it would be better for the Indian semicon industry to stick to its globally known strengths of providing excellent semiconductor design services and embedded design services. At least, there will be clear direction in these areas.

Of course, there exist huge opportunities in all of the areas (or gaps) that I’ve touched upon.

Is enough being done for Indian industry-academia collaboration in VLSI education?

November 20, 2010 14 comments

Do you, as a semiconductor/VLSI/EDA company, run university or educational programs for colleges and institutes? Am sure, you do!

Well, are you providing these various colleges and institutes with the latest tools and EDA software? Perhaps, yes! So, do you regularly check whether your tool is being used properly, or at all? What do you do if the tool remains unopened or unused? Okay, before all of that, are you even guiding the faculty and students to tackle real world problems associated with chip design?

Do the students (and the faculty) know the intricacies of 22nm, 32nm, 45nm, and so on? Are you able to assist students in taping out? Right, is the syllabus taught in all of these colleges good enough to produce the kind of talent and skills that the semiconductor/VLSI industry requires currently, and in the future? Is everything being taught, the latest?

As they say — it takes two to tango… and, it takes two hands to clap! To the Indian academia — how many among you are “really” serious about being trained on a regular basis by the semicon/VLSI/EDA industry? What have you all done about it so far, all of these years? How many colleges and institutes among you (and do you) regularly put up or raise your hand to the industry and say — we lack the knowledge in a particular area and need training – please help us!

The question is: what are you, as a semicon/VLSI/EDA company, doing about training the various faculty and the students in various colleges and institutions across India? Do you have a proper program in place for this activity? Well, is enough being done regarding the industry-academia collaboration in VLSI education in India? What more needs to be done?

Are you, as a college or institute teaching VLSI, happy with the quality of talent coming out? Are you really satisfied with the quality of B.Tech/M.Tech projects? Do you seek industry’s help regarding training on a regular basis? What steps do you take to reach out to them? And, what are you doing about it all? Do you take that initiative seriously?

For that matter, are there easy-to-use systems that enable effective and industry-relevant education? Are those being made use of properly? Can entry barriers be lowered for students and faculty so they can explore an IP idea that has business potential? How many of the colleges have done this? I know of some folks trying to develop such solutions, but that’s a separate story for another day!

Coming back on track, apparently, some semicon companies and few well known Indian institutes are really exceeding themselves, but the same story does not hold true everywhere. Why is it so?

There could be a variety of reasons, and not all are listed here. Is it a lack of initiative on part of the industry and the institutes? Don’t they even talk to each other? Are institutes not able to approach semicon companies and vice versa? Or, is it the locations of the institutes themselves? Is it that not all institutes are concerned about teaching their students how to solve real world chip design problems?

An industry friend had once remarked: As of the last three-four years, students from the Eastern part of India have no clear pathway that they can pursue to get into VLSI design. The reasons are — there are no training institutes in the East, which can teach Synopsys or Cadence tools or even the basics of Xilinx FPGA design.

A very interesting panel discussion titled Forging win-win industry-academia collaboration in VLSI education was held during the Cadence CDNLive India University conference.

Moderated by Dr. C.P. Ravikumar, technical director, University Relations, TI India, the panelists were Dr Ajit Kumar Panda from NIST Behrampur, K Krishna Moorthy, MD, National Semiconductor India, Dr K. Radhakrishna Rao, head, analog training, TI. India and R. Parthasarathy, MD, CADD Centre.

I have already covered Dr. Ravikumar’s remarks separately.

Let’s see what the other panelists have to say about all of this, and whether they have answers to all of the questions or problems. Well, this is another long post, so please bear with me! 😉 Read more…

Intel opens manufacturing doors to Achronix! Becomes mini foundry?

November 2, 2010 1 comment

For those who are not aware, yesterday, Achronix Semiconductor Corp. announced strategic access to Intel’s 22nm process technology, and plans to develop the most advanced FPGAs.

According to the release, the Achronix Speedster22i FPGA family will shatter existing limitations of FPGAs, allowing cost effective production of high performance devices over 2.5M LUTs in size, equivalent to an ASIC of over 20 million gates.

What’s really interesting in all of this is the involvement of Intel and Achronix’s use of Intel’s 22nm technology.

Now, about two weeks ago, Intel announced investment plans between $6-$8 billion on future generations of manufacturing technology in its American facilities. This will fund deployment of Intel’s 22nm manufacturing process across several existing US factories, along with construction of a new development fab in Oregon. The projects will support 6,000-8,000 construction jobs and result in 800-1,000 new, permanent high-tech jobs.

Following this Achronix activity, could it be just the beginning where Intel also allows several others to make use of its latest process technologies, or is it going to be just a one-off thing? Probably, the first one! Here’s why!

On visiting Intel’s site, there’s a blog post by Bill Kircos, director, Product and Technology Media Relations, Global Communications Group at Intel.

He says: “With Achronix, we are selectively offering access to our 22nm fabs. For perspective, this deal would only make up a tiny amount of our overall capacity, significantly less than 1 percent, and is not currently viewed as financially material to Intel’s earnings. But it’s still an important endeavor for us that we’re committed to deliver on. I can tell you the folks over at Achronix are very excited about the opportunity and the expected performance boosts they will see in their Intel manufactured products. We are too.”

Bill has asked for readers’ views on Intel opening up its manufacturing facilities to others. I have given a thumbs up!

Intel has become a mini foundry for the time being. Depending on whether customers find some ‘alignment’ — which am sure they will — this looks to be a good move on part of Intel.

Finally, I had a very excited caller this morning — an industry friend — who simply gushed — ‘you should write about this’! My guess: he and several others are likely to approach Intel for assistance, if not now, then surely in the near future.

Smaller companies would stand to benefit in the long run if they can have access to Intel’s latest process technologies. Of course, we are talking about really sophisticated chips here!

While we have to see what GlobalFoundries and TSMC have to say, Intel’s latest move will probably make it a really interesting level-playing field among foundries.

Is global semicon inventory level headed for oversupply in Q3?

October 29, 2010 Comments off

Early this month, iSuppli had indicated that semiconductor inventory levels may have headed into oversupply territory in Q3.

It said: “Semiconductor Days Of Inventory (DOI) for chip suppliers are estimated to have climbed to 75.9 days in the third quarter of 2010, up 1.5 days from Q2. DOI in Q3 also was 4.8 percent higher than the seasonally adjusted average for the period.”

iSuppli added that the value of inventory was not been this high since the second quarter of 2008, when semiconductor suppliers’ stockpiles peaked at $35.4 billion.

Thanks to Jon Cassell and Debra Jaramilla at iSuppli, I was able to speak with Sharon Stiefel, analyst for semiconductor inventory and manufacturing for iSuppli on this situation.

Is there really an oversupply?

Sharon Stiefel, iSuppli.

Sharon Stiefel, iSuppli.

I asked Sharon Stiefel that given the growth that 2010 has seen so far, why are semiconductor inventory levels heading into oversupply territory in Q3?

She said that semiconductor inventories, overall, have risen both in terms of DOI and dollars for the past several quarters, and not yet achieved pre-recession levels last seen in 2008. “The overly lean conditions of 2009 and early 2010 are giving way to inventory levels, which are more appropriate for the strong growth experienced in 2010.

“Oversupply in Q3 2010 is not a foregone conclusion, but is possible that if the companies are not able to match manufacturing run rates with demand as the year winds to a close,” she added.

Which sectors have been witnessing or recording some softness in demand and why?

Stiefel said: “Companies reporting Q3 revenues over the past two weeks have reported a softening in demand, particularly in PC and consumer end markets, attributed to the continued uncertainty in the global economy, leaving consumers unwilling to spend.  A company with more exposure to these sectors has more potential of excessive inventories, versus a company with a more balanced product portfolio.”

Industry needs to moderate inventories
It is also said in iSuppli’s release that: ‘The industry will need to moderate inventories at the appropriate time in its growth curve in order to capture current revenue opportunities while they still exist.’ So, when exactly is that appropriate time?

Stiefel noted: “The appropriate time is when sales opportunities exist – projected quarters of growth, rather than revenue contraction. Semiconductor revenues are projected to grow in Q3 2010, contract in Q4 2010 and Q1 2011, and then resume moderate single digit growth for the remainder of 2011.” Read more…

Overview of emerging power management opportunities

September 19, 2010 Comments off

First, I must thank my friends, Lou Hutter, SVP and GM, Analog Foundry Business Unit, and Aabid Husain, VP of sales and marketing, from Dongbu HiTek Semiconductor, for sharing the presentations made during an EE Times virtual conference on emerging power management opportunities held on Sept. 16.

The conference participants were:
* Stephan Ohr, panel moderator and research director, Analog and Power Semiconductors, Gartner Inc.
* John Pigott, Freescale fellow, and analog IC guru and designer, Freescale Semiconductor.
* Ralf J. Muenster, director strategy and business development, National Semiconductor.
* Wayne Chen, VP for Technology and Operations, Triune Systems.
*  Lou N. Hutter, SVP and GM, Analog Foundry Business Unit, Dongbu HiTek Semiconductor.

Gartner’s Ohr started by indicating Gartner’s position on power management products. The standard analog ICs were a $15.2 billion market globally in 2009. Voltage regulators made up $7,394 billion, amplifiers $2,675 billion, data converters $2,567 billion, other analog $1,331 billion, and interface ICs $1,198 billion, respectively.

Voltage regulators – power management ICs accounted for 48.8 percent of the analog market. Voltage regulators continue to show strongest growth, growing at a CAGR of 11.1 percent for the period 2009-2014.

Power management ICs forecast
The global revenue forecast for power management ICs by market segment is as follows:

Military and aerospace:
This is likely to grow at a CAGR of 3.2 percent during 2009-14.
Industrial/medical: This is likely to grow from $1,118 million in 2009 to $1,779 million in 2014, at a CAGR of 9.7 percent.
Automotive: This is likely to grow from $415 million in 2009 to $622 million in 2014, at a CAGR of 8.4 percent.
Communications: This is likely to grow from $529 million in 2009 to $988 million in 2014, at a CAGR of 13.3 percent.
Wireless: This is likely to grow from $1,353 million in 2009 to $2,149 million in 2014, at a CAGR of 9.7 percent.
Storage: This is likely to grow at a CAGR of 13.3 percent during 2009-14.
Computing: This is likely to grow from $2,114 million in 2009 to $4,013 million in 2014, at a CAGR of 13.7 percent.
Consumer: This is likely to grow from $1,627 million in 2009 to $2,564 million in 2014, at a CAGR of 9.5 percent.

Server and wired communications remain the biggest drivers.

Emergence of BCD technology
Lou Hutter from Dongbu HiTek discussed the technology considerations for emerging power management markets. He focused on the emergence of BCD (Bipolar/CMOS/DMOS) technology.

There are multiple benefits of BCD technology. These include integration of bipolar, CMOS, and DMOS components. It enables the integration of logic, analog control, and power on same die. It also enables high-and low-voltage, and high-and low-power functions on same die. BCD further enables reduced chip count, and improves reliability through fewer package interconnects. It also enables reduced BOM costs.

Emerging markets, such as automotive, solar and energy harvesting, stand to benefit from BCD. Dongbu is offering the 0.18um platform, which boasts of IP portability and more. Dongbu is offering the BD180LV-30V power process (Epi), to be followed by the BD180LV-30V power process (Non-Epi) in 3Q10, the BD180X 40-60V power process in 4Q10, and finally, the HP180 precision analog in 2Q11.

Hutter explained the BD180LV-30V Optimized Power and BD180X – 60V Optimized Power processes. Optional modules in Dongbu Hitek’s BCD technology include Schottky Diode, thick Cu, PLDMOS, NVM, low power CMOS, low noise CMOS, respectively. Read more…

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