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Global semicon market set for slowdown due to deteriorating business climate!

August 16, 2010 1 comment

Now that’s going to be very interesting, should it happen! After close to two quarters of robust growth experienced by the global semiconductor industry, a slowdown was bound to be around the corner!!

I was going through a report sent out today, by Dr. Robert N. Castellano, president of The Information Network, New Tripoli, USA, of the same title, and decided to get his thoughts.

Deteriorating business climate

Dr. Robert N. Castellano, president, The Information Network.

Dr. Robert N. Castellano, president, The Information Network.

According to The Information Network, The business climate for the semiconductor industry is deteriorating, as per its upcoming report, titled, “Hot ICs: Market Analysis and Forecast of the Top 15 IC Sectors”.

As per the report, along with fellow DRAM manufacturers Samsung, Hynix, Elpida, Micron, etc., will suffer from slowing sales of electronic gadgets and PCs. In the CPU sector, the slowdown in PC sales will affect Intel and AMD. Foundries such as TSMC and UMC will also be impacted.

As sales drop in electronic gadgets, the most pronounced affect will be in the DRAM sector, where sales grew 135 percent in Q2 2010 compared to Q2 2009. The drop in semiconductor sales will usher in a corresponding drop in semiconductor equipment and materials sales.

The front-end market will suffer pushouts and the lithography sector will be impacted most, where sales of $35 million immersion DUV tools have flooded the market of late.

Slowdown likely in world economies

I quizzed Dr. Castellano as to why the semiconductor business climate is deteriorating.

He said: The semiconductor industry is directly correlated with the economies of the world, and there is a direct correlation with semiconductor sales and worldwide GDP. Our leading indicators (LI) point to a slowdown in the world economies.

“As these proprietary LIs are correlated with semiconductor revenues, we will se a slowdown in the next few months. We are already seeing signs of a slowdown in the PC and LED indistriies. Numerous public companies have given forward guidance that the next quarter will show some weakness.”

Given the good two quarters this year, how certain is The Information Netwok that the semicon market is now set for slowdown? Dr. Castellano cited similar reasons as above, adding: “Our LIs have an extremely accurate correlation with transition times. We have developed these LIs over the past 15 years.”

What’s the impact on foundries and silicon wafers?

So, how will all of this impact the foundries?

Dr. Castellano said: “Foundries make their money from two sources: sales of ICs from fabless IC companies and sales of ICs from IDMs who do not have sufficient in-house capacity or sufficient technology capabilities for newer ICs. The macroeconomic effect will stymie sales for both revenue sources.”

Does The Information Network foresee an overcapacity situation in silicon wafers during 2011?

“No. We are forecasting 8.4 BSI (billion square inches) of Si wafers in 2010, which is up slightly from the 8.2 BSI in 2008. So, the Si manufacturers have the capacity already on hand. Semiconductor wafers will face competition from solar wafer  consumption, which will double in 2010, but polysilicon is plentiful, and the two sectors, for the most part, use different crystal growing methods,” he added. Read more…

Infineon’s wireless strategy focuses on low cost solutions and smartphones

July 2, 2010 Comments off

Fairly recently, thanks to the great efforts of Infineon’s Abhinav Alok, I was able to meet up with Dr Matthias Ludwig, Head – Wireless for APAC and Infineon Korea and Peter Schaefer, VP & GM, Head – Microcontrollers, Infineon.

However, post the meeting, to my horror, I misplaced my notes and only managed to locate them last week. My apologies to Infineon for being late with this blog post.

I was able to discuss Infineon’s wireless strategy with Dr Ludwig and also managed a peek at Infineon’s range of microcontrollers during my discussion with Peter Schaefer. First, let’s have a look at the company’s wireless strategy.

Dr Matthias Ludwig said: “We are good in RF and baseband. There are about 1.5 billion RF transceivers out there globally, from Infineon.” He added that one third of the market falls in the low cost mobile phone segment.

Infineon’s wireless strategy is two fold — low cost solutions and the smartphone platform — where the company is focusing on the modem and the RF side, respectively. Infineon’s Android based smartphone platform uses an ARM 11 baseband. “Customers can come up with their own application processor,” Dr Ludwig said. “Our strategy gives us a lot of flexibility.”

He mentioned that Infineon receives a lot of requests from customers for smartphones at $100 solutions. “We believe that we can manage our single core Android platform in the $100 segment.”

Thanks to Dr Ludwig, I had a first hand experience of some of the smartphones that Infineon is currently working on. Actually, think about it! A $100 dollar (and even sub $100) smartphone may be just the thing Indians would love to have.

As for Infineon’s India strategy — part of the focus is on low cost. “We know that there is tough competition out there,” noted Dr. Ludwig. One other aspect that Infineon is focusing on is: how to develop and build an ecosystem in the country.

Of course, Infineon is also looking beyond the Indian market when it is developing solutions. In that respect, Dr Ludwig added that one of Infineon’s focus is to find the sweet spots that are not only of interest to India. “There is a certain drive to have low end products. Safety and reliability of the products are also important,” he concluded.

I will add a separate post on the conversation with Peter Schaefer, VP & GM, Head Microcontrollers, Infineon.

ST intros STM32L EnergyLite ultra-low-power MCUs for portable and very low power apps

May 3, 2010 Comments off

STMicroelectronics' STM32L EnergyLite ultra-low-power MCUs.

STMicroelectronics' STM32L EnergyLite ultra-low-power MCUs.

STMicroelectronics recently launched the STM32L EnergyLite ultra-low-power MCUs. I caught up with Vinay Thapiyal, technical marketing manager, MCU’s, ST India, to learn more.

The highlights of this series of MCUs include a commitment for ultra-low power — the EnergyLite platform is common for 8-bit (STM8L) and 32-bit (STM32L) MCUs. Also, it is strong on pure energy efficiency, with high performance combined with ultra low power, i.e., high high energy saving.  Finally, the ultra low power member in STM32 portfolio enriches both the STM32 ultra-low-power EnergyLite platform and the STM32 portfolio.

According to Thapliyal, STMicroelectronics has been involved in the MCU market for a long time. Off late, it has started focusing on the STM32 — the ARM Cortex based MCU and the STM8 — for 8-bit family. “We have started converging our old families into these two domains,” he added.

The STM32F is the foundation of the STM32 family. STM32F is a family of low power MCUs based on the 32-bit ARM Cortex M3 architecture.

The STM8 is a family of MCUs based on ST’s propritetary atchitecture. The STM32L is STMicroelectronics’ ultra low power family mainly used for portable and very low power applications.

The ultra-low-power EnergyLite platform, featuring the STM32L and the STM8L is based on STMicroelectronics’ 130 nm ultra-low-leakage process technology. They share common technology, architecture and peripherals. The STM8, which was launched in 2009, has caught on very fast. It is a high performance, low cost MCU.

He added that STMicroelectronics started with 130nm technology, and low pin count and low flash on STM8, while higher memory and high pin count is available on the STM32. Read more…

Altera expands low-cost Cyclone FPGA series

November 3, 2009 1 comment

Altera's Cyclone IV FPGA.Altera Corp. has introduced the Cyclone IV FPGAs, thereby expanding the success of the low-cost Cyclone series.

The Cyclone IV GX is said to be the lowest cost, lowest power FPGAs with transceivers, and the Cyclone IV E has helped it extend the lead in combining low cost, low power, and high functionality. Simultaneously, Altera also extended its transceiver portfolio leadership.

The Cyclone IV FPGA family offers two variants. Cyclone IV GX devices have up to 150K logic elements (LEs), up to 6.5-Mbits of RAM, up to 360 multipliers, and up to eight integrated 3.125-Gbps transceivers supporting mainstream protocols including Gigabit Ethernet (GbE), SDI, CPRI, V-by-One and Cyclone IV GX has hard IP for PCI Express (PCIe).

According to Jennifer Lo, Senior Marketing Manager, Altera, the company is pushing bandwidth limits in cost-sensitive markets and products — specifically, smartphones, wireless communications, industrial Ethernet, broadcast and 3D displays.

There is said to be a huge demand from Latin America, Asia, etc., specifically in wireless. Altera is providing a low cost, low power solution. Next, the trend is also moving from 2D to 3D displays. In broadcast it is moving to high bandwidth, in order to support HD video.

Easier for designers to debug FPGA designs
With the new Cyclone IV, will it become easier for designers to debug FPGA designs, especially when looking at the hardware and software aspects? Lo said that ease of use has always been a focus for low-end products for Altera.

“To that end, with Cyclone IV FPGA’s, like other Cyclone series, we strive to provide reference designs, design examples, development boards to customers to jump-start their design. With respect to debugging, we don’t see any particular differences between Cyclone IV and previous Cyclone generations.

“However, with more training, both fundamental trainings offered free on-line and more in-depth instructor-led trainings are available to help customers get accustomed with the Altera design methodology and use of our Industry-leading development software,” she added.

Altera had introduced the Cyclone III LS FPGA development kit, as well as shipments of industry’s first FPGAs with integrated 11.3-Gbps transceivers. How are all of these going to help Altera overall, given that Q3 saw a 3 percent increase; and help boost FPGA sales?

Lo added: “FPGAs usually have a longer design cycle (at least a few months before prototyping and another few months till mass production. With the recent few product additions, Altera is in a technology leadership position that we are all very proud of and confident that we will be able to reap the results of in the near future.” Read more…

Display driver depression follow flat panel succession!

July 30, 2009 Comments off

Recently, Randy Lawson, Senior Analyst, Digital TV and Display Electronics, iSuppli Corp., discussed the application market for large and small LCD panel display driver semiconductors, including consumer, monitor monitor/notebook PC displays, consumer plasma displays and cell phone and portable displays.

The LCD driver semiconductor market took a disastrous turn in the second half of 2008 as the economic downturn kicked into high gear and the entire electronics supply chain suffered unprecedented declines. Now, as the industry enters H2-09 and forecasts prognosticating better times, vendors of these display driver ICs are looking at when they will see the market recover.

Revenues history of display driver market
Going by the revenues history, the display driver market peaked in 2005 in terms of revenues. The year 2008 saw revenues for display driver ICs dip ~$1 billion from 2007 levels.

The economic crisis resulting in large production cutbacks in all panel types was the main cause. Also, the driver IC unit shipments fell ~30 percent in 2H-08, compared to 2007 levels.

There have been various factors limiting revenues — ASP pressure due to panel price, competition, technology shift, particularly, advancements in multichannel and gate-in-panel technologies.

In the last half of 2008 panel production went dramatically low. Some Taiwanese panel fabs were at 50 percent capacity or lower, said Lawson. This market, in terms of iSuppli, has peaked in terms of revenue outlook. It is a very large market in terms of units.

Tracking 2009 recovery
iSuppli has been tracking the monthly shipments of large panel driver ICs in 2009, a main area to watch for recovery signs. Q4-08 was devastating with over 30 percent drop in shipments. However, the large panel driver IC shipments improved from January onward. Also, the panel fab utilization rates increased. The low inventories of IC increased the orders.

However, according to iSuppli, the Q3 outlook is likely to be flat to Q2-09 due to higher quarterly baseline.

Dec. 08 vs. Nov. 08 was down 40 percent in terms of unit shipments. From Jan. 09 onward, shipments started going back up. It really went up in February and March as well. Going into April, things are slowing down a little bit, but it is positive for now. Lawson said that Q3 will likely be pretty flat. The industry is still down on a YoY basis, a point to be noted.

Driver IC units forecast
According to iSuppli, the large LCD saw ~13 percent CAGR and small LCD ~2 percent CAGR. The overall driver IC unit growth rate is likely to be ~10 percent CAGR from 2008-12. Growth will be due primarily to the large panel applications as mobile displays unit growth limit potential for small panel driver ICs, advised Lawson.

“We still have a pretty robust outlook for driver ICs from 2008-2012. LCD TV growth is remaining. Monitors and notebook PCs continue to show relatively strong growth in the long term trend,” he said.

Large panels are where the driver ICs will find its biggest opportunity. Small panels will be down this year due to much lower unit shipments. This is due to the quite lower volume shipments of mobile handsets, which make up approximately two-thirds of all categories of drivers in the small categories.

Display driver market forecast — revenue outlook
In this area, the revenues are likely to be more dictated by large panels. The small panel driver revenues are falling due to the ASP erosion exceeding units growth.

As for the large LCD driver IC revenue swings during the forecast period, 2008 and 2009 will contract due to the overall poor economy hurting customer demand. However, 2010 and 2011 should see strong growth return based on very attractive prices for panels and emerging markets taking more share of LCD TV market and growing.

On the whole, the total revenues are likely to contract >13 percent from 2008 to 2012. The year 2009 will be dramatically down by 20 percent over 2008. “Revenue growth is not there for small LCD drivers. The unit growth strong enough in small drivers to counteract the ASP erosion,” said Lawson.

Also, some of the market for small panels is LTPS, which typically has a smaller driver IC and cheaper driver IC anyway, as some of the functionality of the LTPS panels can be integrated into the panel, making for a cheaper driver IC.

Revenue rebound likely in 2010
Definitely, turbulent revenues lie ahead! As mentioned, 2009 driver IC revenues will show significant decline in 2009 over 2008. Panel production levels are still below a year ago levels.

A rebound is likely in 2010, but it won’t take the industry back to where it was! Keep in mind that the rebound that happens will be due to a rebound in consumer demand as well as the strength of the China market.

Driver IC unit growth has been slowing in the large panel category. This is due to the adoption of multichannel, high-column drivers as well as the gate-in-panel technology effect. Some maturing in LCD monitor and TV applications in Western markets is also causing slower end system unit growth.

As for small panels, the application growth rate is limited. As mentioned, the cell phone unit growth has been declining. Also, the LTPS share has been growing (driver ICs are smaller and less complex).

There have been continual ASP declines. Also, small panels are transitioning from 130nm to 110nm and 90nm, while large panels transitioning from 0.35um to 0.18um/0.16um. Also, there is a transition from 8-inch to 12-inch wafers.

Market share rankings
In this area, there haven’t that many changes. Himax has moved up a bit. iSuppli has added several other companies, such as Lusam, Raydium, Sitronix, Orise, etc., into its tracker.

Q1-09 display driver IC market shares
Q1-09 revenue levels dipped well below Q4-08 revenue levels due to production cutbacks and weak demand in large panel category. The revenue levels were down ~50 percent YoY for Q1-09 as the LCD panel market struggled to find stability in the middle of a disastrous Q4-08 and severe cutbacks in panel production, and thus, IC orders.

The Q4-08 revenues were $1,310mn and Q1-09 revenues were $1,017 revenues — about 30 percent down. Just for the sake of statistics, Q1-08 was $1,936mn.

Large LCD driver market outlook
Here, revenues are likely to grow ~10 percent over the next four years, primarily a rebound from the dismal H2-08 and 2009 levels. LCD TVs will remain a growth engine, overtaking monitor driver IC volumes from Q3-09 forward.

Lawson said: “There are still large markets such as China, and regions that are still in transition to flat panels. More consumers are buying more TVs per household, and decreasing the time between buying TVs.”

However, the monitor driver market has stayed mainly flat, and multichannel use and gate-in-panel are causing diminished unit growth as well.

LCD TV driver type forecast
There is clearly a trend toward multichannel, which is likely to grow for cost, space and reliability savings. It lowers the ICs per panel ratio, and lowers IC unit growth rate as well.

Growth is also expected in 10-bit as well as in TV space for improved image quality. The 10-bit growth may be trimmed due to short term focus on 120/240Hz performance, advised Lawson.

Most of this will be driven by the larger panel category. One trend is toward LED backlighting, which is increasing the contrast ratio.

Small/medium markets scenario
A majority of this market is driven by mobile handsets, which account for two thirds of the market. Almost all of the small display drivers are single chip except for clamshell phones.

Some other major applications of small display drivers include digital cameras/camcorders, automotive, digital photo frames, handheld games/PDAs, PNDs, PMPs, as well as some other applications.

Small display driver forecast
Here, active matrix remains the only growth area left. “Gains will be offset by steep CSTN/MSTN declines,” said Lawson. “The ASP erosion is also an issue.” There is a transition from 130nm/110nm to 90nm, as well as a move to 300mm and LTPS growth.

All of these present further revenue downward pressure as ASP decline exceed the end market growth. Also, the growth in active matrix is not yet enough to offset the revenue decline in cheap drivers used in CSTN/MSTN.

OLED driver ICs
OLED driver ICs are likely to see revenue growth to ~$150mn by 2012. The OLED volumes are still dominated by mobile communication sub-displays, said Lawson.

The AMOLED move to main displays is likely to be next largest market. It is also getting boost from a market shift from pure-music MP3 players to PMPs.

However, competition from TFT-LCD in the near term is likely to slow the OLED panel volume growth. Also, growth in TVs could be a huge market catalyst, but that is not likely to happen until at least beyond 2011.

Lawson added: “The top line is relatively small as OLEDs are still in a mode of competing against amorphous silicon, LTPS, TFT LCDs, etc.. Until OLEDs can resolve some of the manufacturing issues to get to larger sizes, this will remain one of the smaller markets in the whole driver IC category.”

Driver IC process node migration — 2009-10
A majority are currently built on 0.35micron. As mentioned, a process node transition has been occurring in the driver IC market.

Small/portable display driver designs are leading transition to smallest geometry nodes (90nm from 2010 onward).

Technology trends
As for the technology trends for driver ICs, these include TCON (timing controller) functional integration. Frame rate conversion/MEMC, DisplayPort and other new interfaces becoming more prevalent as well.

In packaging, there is a transition to higher pin count/more channels to save cost (large panel). There is an increased use of COG (chip-on-glass) gate-in-panel technology in monitors/notebooks. These are targeted at smaller screens.

There is also a bit-depth move to 10bit. Here, LCD TV performance is spurred by the DeepColor standard and premium TVs. Another interesting feature is the addition of integrated memory for mobile handset displays.

As for interfaces, handset interfaces will see more of serial high speed to reduce cost, EMI, and interconnectors. Here, there will be a role to play for MIPI (GSM market) and MDDI (CDMA market).

MIPI will probably become the predominant industry standard, but it has yet to take off. MDDI, a Qualcomm standard, has already been deployed in millions of displays.

Next, large panel ICs will move beyond RSDS, LVDS, etc., such as Cascade type, Vx1, PPDS, AiPi, and others. Also, DisplayPort is potentially applicable for panels.

Summary
In summary, the panel driver IC market unit growth is solid, but its revenue presents a different story. The unit volumes growth looks healthy due to primarily large panel applications.

The year 2009 will see improvement from the Q1-09 trough, but it will still not show revenue growth from 2008 level. The ASP erosion is likely to lessen in 2009 due to shortages, but the long term trend remains downward in face of process migration and panel price declines.

Expect more diversification/collaboration from DDI firms, noted Lawson. As the DDI market matures, large companies will be seeking new growth markets, synergy to cut costs and improve efficiencies.

Recent examples include Novatek and Cheertek, Himax Media Solutions and Renesas SP Drivers (Renesas, Powerchip, Sharp combined efforts).

Next, the small LCD and OLED driver markets are dominated by mobile phones. Here, MSTN and CSTN volumes will shrink to less than 15 percent by 2012. Also, TFT, LTPS and OLED will remain the growth areas for small/portable displays.

Finally, the large LCD driver market will see growth in gate-in-panel in LCD monitors, and especially in notebook panels. There will be multichannel, fewer driver ICs per panel, higher reliability, and lower component count. Transition to multichannel is key, as TV transition will impact volumes significantly.

Altera Cyclone III LS — first low power FPGAs with anti-tamper, design security, design separation

June 29, 2009 Comments off

Altera has developed the industry’s first low power FPGAs with anti-tamper, design security, and design separation. Extending low-power leadership, these low power FPGAs offer double the resources for less than 0.25W!

The image highlights how Altera is striving to extend its low power leadership with the Cyclone III LS devices.Source: Altera.

The Cyclone III LS devices offer up to 200K LEs for less than 0.25W of static power. It is said to be targeting power- and board-space-sensitive applications in all market segments. “Any market that requires low power and security features will require this product,” said Ms Susan Chang, AP marketing manager for Cyclone Series, Altera, underlining the growing importance of low-power FPGAs into power-constrained applications. The devices are shipping to customers now.

A closer look at the Cyclone III LS FPGAs reveals the following:

Low power: 200K LE (logic elements) for under 0.25W; TSMC 60nm low-power (LP) process; and Quartus II software power-aware design flow.

* Information assurance design suite: Offering data protection for information-assurance applications, features include anti-tamper, design security, design separation and IP, design examples, etc.

* High functionality: Featuring densities ranging from 70K to 200K LEs; up to 8.2 Mbits of embedded memory; and up to 396 embedded multipliers.

The Cyclone III LS FPGAs are said to have the most comprehensive IP protection in an FPGA. It protects the IP with anti-tamper and design security. “There is a JTAG port protection to prevent reverse engineering,” Chang added.

Security features include CRC to monitor for configuration changes, zeroizing the device if tampering is detected, and an on-chip oscillator that acts as an uninterruptible clock source for system monitoring.

Design separation features include single-chip redundancy and supporting information-assurance applications. This leads to reduction in power and board space, as well as reduction in BOM (bill of materials) cost — by about 50 percent.

Yet another feature is that of data assurance with design separation. Designers can now create physically isolated partitions with design separation. This protects against time-dependent faults and SEU, and increases the system uptime as well. These enable achieving a higher level of integration on a single device.

Military market and SDR
According to Chang, the military market will be among the most important ones for these devices. Hence, Altera’s clear thrust on design security and prevention of reverse engineering!

Focusing on the size, weight, and power (SWaP), these will support next-generation SDR waveforms with small footprint and low power (e.g., MUOS, SRW), night-vision goggles, and secure communications. It features crypto-modernization moving toward standardization.

The Cyclone III LS devices also support existing SDR (software-defined radio) applications. Chang said that SDR is one common design trend in the military market.

The next-generation software-defined radio (SDR) waveforms require more memory and logic for networking in the field and low power for extended battery life. Some other key requirements include small footprint for board space, data security for multiple channels in a single chip, and IP security and anti-tamper.

As far as the next-generation SDRs are concerned, these devices will facilitate reduction of the overall board space by up to 50 percent, an increase in the battery life by up to 2X, besides facilitating a single-chip secure SDR solution.

Cadence’s focus — systems, low power, enterprise verification, mixed signal and advanced nodes


I recently had the opportunity of meeting up with Nimish Modi, Senior Vice President, Research and Development, Front-End Group, Cadence Design Systems, along with Rahul Arya, Marketing Director, Cadence Design Systems (I) Pvt. Ltd.

Modi provided a perspective on how solutions from the EDA sector help the electronic design industry improve productivity, predictability and reliability of design processes, especially verification. Design verification is the process of ensuring that a chip design meets its specifications.

According to him, today’s product development ecosystem comprises of three driving forces — productivity, predictability and reliability. “We are clearly at the core of product development. We have a very strong breadth and depth. There is a layer of solutions we have integrated with our product offerings,” he added.

He highlighted that Cadence’s solutions consist of integrated point tools, as well as recommended use models. It also has a very strong services offering.

Focus on five key areas
Currently, Cadence is focusing on five key areas — systems, low power, enterprise verification, mixed signal and advanced nodes. “We have a solutions oriented approach across the board,” Modi said.

On systems, it is key to focus on gaining more productivity. Modi said: “This can be done by raising the level of abstraction. The technologies available to address ESL have been around for a while, each one addressing a piece of the puzzle. The need is there for seeing tremendous improvements in that. Here, Cadence’s C-to-Silicon Compiler comes in.”

“The other piece is — it has incremental synthesis capabilities. A third thing — it is connected to the downstream flow. This is the foundation of our systems strategy,” said Modi.

Coming to the systems design and verification strategy, the first component involves planning and management. “We have an enterprise manager,” he added. Cadence has been a leader in the hardware assisted verification with rich VIP/SpeedBridge portfolio. It has enabled a move to TLM driven design and verification flow. Cadence also delivers unique system power exploration, estimation and optimization flow. It provides unique hardware/software co-verification capabilities (Incisive Software eXtensions) as well.

Low power strategy
On Cadence’s low power strategy, Modi highlighted three components — implementation, verification and design. “The innovation was the ability to create a power format to capture the design intent. We are committed to providing flow operability as well. We want customers to make use of advanced power management techniques,” he added.

“We have the superior low power technology,” he claimed, referring to the Power Forward Initiative (PFI). “Look at technology — that is proven. The format is a means to the end. We are also working on providing more capabilities in the power exploration space. We are working under different aspects.

“You can do power analysis on the IP block; there’s C-to-Slicon, which has power as a function; multi-supply voltage will be a component of our synthesis solution. All of these vectors are driving the power exploration space. Seventy percent of chips’ power is determined at or before the RTL stage,” said Modi.

Cadence has a closed loop verification methodology. At each stage, you can go back and make sure you can be consistent with what’s there upfront.

Enterprise verification strategy
On enterprise verification, Cadence’s approach is plan-to-closure. Predictability — utilize executable plans and metrics that predict functional closure; productivity — effectively deploy methodolgy driven multispecialist flows. with VIP and multiproduct automation; and quality — reduce risk of functional bugs at tape-out at various project stages.

Modi added: “Our verification IP portfolio is also very critical. The depth of our portfolio is the broadest in the industry. In verfication, the actual TAM is growing. We are getting opportunities as well. Multi dimensions of enterprise verification are being taken care of by us.”

Interesting that all EDA companies have focused on verification! Why now and why not earlier? Modi said: “We’ve been in this area for a while. We have pioneered the new approaches. The goal is: how do you know it is good enough to hit the tapeout button? Our goal is to raise the confidence of customers.”

He added: “We are coming uo with a hybrid model. We are engaging with customers at this point of time. We came up with multi-language support in OVM. We have 30+ verification IP portfolios.”

Trends in complex SoCs
Today, it is largely a mixed signal world. Mixed signal IC revenue has been increasing faster than the rest of the industry. It is driven by applications, including wireless devices, consumer and DTV, and automotive.

Modi said: “There is a genuine need to support natively analog behavioral models in a digital centric verification environment. Mixed signal is a larger percentagre of area and effort.”

Coming down to advanced nodes, it is no surprise that Cadence definitely supports MCMM (multicorner and multimode). “It is part of our Encounter Digital Implementation System,” added Modi.

Fellow bloggers, add traffic using Widgetbox Blog Network!

September 19, 2008 Comments off

I’ve been a user of Widgetbox for quite some time now, and two of my widgets there are doing alright! So, when I came across this story on PR Newswire about the Widgetbox Blog Network, it presented me with yet another opportunity to try and reach out to a wider audience.

Of course, I am well aware that I mostly blog about semiconductors, and that this topic does not have a very large audience, nor does it rank high on popularity! Well, no problem!

Widgetbox, by the way, is said to be the world’s first and largest widget community. It does offer a wide range of excellent widgets, which are essentially, floating pieces of the Internet. You embed the code of the widget (or gadget) on to your site or blog, and that’s it!

Coming back to Widgetbox’s Blog Network, it is said to be a federation of bloggers and online content publishers that fosters connections across the Widgetbox network through 29 vertical channels. The new channels instantly extend reach, drive traffic, increase brand awareness, and expose blogs to new readers.

Since I’ve been a Widgetbox member for some time, all I had to do is sign in, and click on the link adding me to the Blog Network. Users or members can browse the channels in the Widgetbox network and see the latest content from its community of leading bloggers and publishers.

The range of channels is quite extensive. It covers things like Art, Education, Food, Home & Design, Music, Politics, Television, Women, Autos, Family, GLBT, Humor, Parenting, Sports, Travel, Business, Fashion & Style, Green, Men, Pets, Tech Gadgets, Video, Celebrity, Finance & Investing, Health, Movies, Photos, Tech News and Video Games.

My blidget is registered under Tech News, and it also shows up a network blidget on my blog — linking to other blogs displaying tech news — which is good! Being a writer, widgets make my life much more easier. All of these widgets allow me to access all the tech news from all over the world, which I want to see, based on my own preferences.

I cannot really comment whether this new blog network will generate traffic, so I’d like to wait and watch. However, as a writer, it has always been my endeavor to write quality content, largely on semiconductors and telecom — two of my most favorite subjects! I am also aware that semiconductors is not so popular as a traffic, and will only have a limited audience. Writing about semicon and maintaining a semicon blog is not easy, and won’t be easy at any point of time!

However, all of that does not bother me! Even if a handful of friends from the global semiconductor, and telecom, industries like what I write or blog about, the effort is worth it!

To all fellow bloggers, there’s absolutely no harm in trying out the Widgetbox Blog Network, folks. Best of luck, and happy blogging everyone!

Synopsys’ Dr Chi-Foon Chan on India, low power design and solar

September 11, 2008 1 comment

There have been reports about the troubles within the EDA industry in recent times, especially those related with quarter sales. Interestingly, Synopsys has been the one sailing along fine! If that’s not enough, it made its intention known of playing a role on the solar/PV segment, an area where lot of investments have been happening!

Given this scenario, I was fortuitous enough, rather, extremely lucky to be able to get into a conversation with Dr. Chi-Foon Chan, President and Chief Operating Officer, Synopsys Inc., during his recent visit to India.

On the state of the global semiconductor industry, he said, it was somewhere now in the low 10s [well below 10 percent]. The EDA industry is currently tracking below that level. However, Synopsys has been growing at around 10 percent. He said, “The technology challenges today are very high.”

Synopsys has a substantial number of R&D population based out of India. Giving his assessment of the Indian semiconductor industry, Dr. Chan added: “Our main interest in India is largely talent and the academia. India can very well get more into the product development side. Even the outsourcing of designs have increased. Our capabilities, of the Indian team, have also increased.”

As with any good semiconductor ecosystem, the Indian industry also needs a proactive industry association, a role played to near perfection by the ISA (India Semiconductor Association). Acknowledging the ISA’s role, Dr. Chan said, “The ISA has also formed a very cohesive team.”

There is little doubt about India’s growing importance in technology strengths and managerial leadership. Dr. Chan added: “We are more on the high-end side and also track what others design. In India, the profiles of designs are definitely high-end in nature. This is largely due to the presence of a large number of MNCs. A very high percentage of designs are in the 45nm and 65nm process technology nodes.”

There is another significant indicator of India’s growing importance, and that is the huge rise in the attendance of the SNUG. In 2000, this event attracted 180 people. However, in 2008, the SNUG attracted over 2,000 people.

Moving India to next level
Given the very high level of commitment on Synopsys’ part toward India, there was a need to find out from Dr. Chan what exactly India needs to do to move to the next level in the value chain in the semiconductor ecosystem.

He advised: “India can do two to three things. One, for the system to grow, you need the government, academia and industry to grow together. India has all of the ingredients required to drive products.”

Comparing India with China, he highlighted the fact that while in China, the local consumption was higher than local supply, that was not the case with India!

“Therefore, looking at merely the local market is not the only thing. Products developed here can also be targeted at the Middle East and Southeast Asia.” He was quite forthright in his analysis, adding: “Industries start when you find markets. The skill sets are already present here. There can well be multiple startups.”

Dr. Chan also touched upon the fab vs. fabless issue, noting that there could well be more of fabless companies in India. “Building a fab requires lot of capital. Also, consolidation will continue to happen.”

What role does Dr. Chan see Synopsys playing in the Indian context? He said: “Synopsys will continue to be a catalyst for the industry. A healthy design industry in India continues to help us. We also work well with the Indian universities. Having more people from the universities will always help. We also invest a lot in application support. The application team also trains others. I now look forward to seeing more fabless companies here and India to become even more global.”

On low power design
India is also a centre of expertise in low power design, given that low power is hugely important in today’s electronics ecosystem. Dr. Chan commented that low power has always been the number one design issue. It cannot be taken care of at one single stage.

He added: “A slightly new concept that has emerged is low-power verification. There are so many schemes for attacking low power, such as multiple voltage islands. We (Synopsys) are spending a lot of effort in low power.

“As a designer, you require detailed analysis. Low-power verification is now coming up. Another area is testing. As an example, if so much power is required, how do you have the power cut from the tool you are using to test? From a Synopsys point of view, we are involved in several points, such as front-end synthesis, testing, sign-off, verification, etc. We are trying to put in a whole lot of methodologies.”

Synopsys in solar
EDA may be able to help by lowering power requirements and leakage on better products. Especially, the Synopsys’ TCAD product can be used to create more efficient and effective solar cells. Now, this is not a new development anymore. Synopsys, along with Magma, have already made known their intentions about setting foot in the solar/PV space.

On the TCAD, Dr. Chan said: “We have a very strong position in the TCAD, commercially. Now, it is one of our most critical elements in high-performance. Our TCAD is among the strongest in the EDA industry.

“In solar, it does not have to be a complicated place-and-route, etc. From an entire solar industry point of view, we have now used some effort from TCAD into this space. Heat transfer issues, etc., are more in the EDA space.”

I will continue my conversation with Synopsys on its solar initiative sometime later. Keep watching this space, folks

Tackling low-power design issues — Synopsys

July 1, 2008 Comments off

Managing power efficiently is not a choice, but an imperative. Semiconductor content is increasing everywhere, and in fact, consumers and globalization are driving the semiconductor content in electronic systems.

A glance at the ecosystem pyramid reveals that the global electronics industry stands at US$3,200 billion, semiconductors at US$274 billion, equipment and materials at US$86 billion, and EDA at US$4.4 billion. EDA is at the heart of the electronics industry.

Subhash Bal, country director, Synopsys (India) EDA Software Pvt. Ltd, says that for low power imperatives, it is important to look at systemic factors. Energy usage and carbon emissions, especially, have been growing alarmingly, and will continue to do so for quite some time. This is largely due to uncontrolled consumption of devices and other electronic equipment. “We need to support energy usage without carbon emissions. In that respect, solar is a good solution,” he adds.

Computing is energy intensive by nature. Consider these stats — approximately 1 billion of the world’s PCs are switched on for nine hours per day, requiring 95,000MW. And of the US$250 billion spent globally each year powering computers, about 85 percent of that energy is wasted, while the computer stands idle.

Today, more devices and gadgets are being introduced, with more features and at lower prices. All of these devices demand a huge amount of battery power. Speed increases at the expense of energy consumption. Leakage has also become a major issue. There is therefore a growing need to solve power-related problems.

The Synopsys Sentaurus
Synopsys’ Sentaurus optimizes a device’s power. It also addresses photovoltaics. The Sentaurus process is an advanced 1D, 2D, and 3D process simulator for developing and optimizing silicon and compound semiconductor process technologies.

Created by combining features from Synopsys and former ISE TCAD products, together with a wide range of new features and capabilities, Sentaurus is a new-generation process simulator for addressing the challenges found in current and future process technologies. “The Sentaurus takes care of the processing part. It does modeling, 2D/3D simulation, etc. It can be applied to both semiconductors and solar,” says Bal.

Eclypse low-power solution
Synopsys’ goal is to deliver the most comprehensive solution, enabling designers to build the most advanced, low power chips and systems in the world. In the hope of achieving this, it has introduced the Eclypse low-power solution. Sharat D Kaul, sales and marketing manager, Synopsys India, highlights the fact that the Eclypse looks at the design side specifically.

The silicon-level concerns include factors such as more functionality, more computing power, limited power budget, design complexity, verification complexity, testing, reliability and schedule. System-level concerns include factors such as battery life, system cooling, reliability, packaging cost, operating cost, air conditioning cost, carbon footprint and green initiatives. Most design teams are both overwhelmed and under prepared.

The Eclypse low power solution is aimed at addressing such needs. It provides an alignment of technology, IP, methodology, services and industry standards — geared to meet the challenges of advanced low power designs.

Eclypse supports the industry-standard Unified Power Format (UPF) language, used to capture low power design requirements. It offers low power education programs, end-to-end UPF support, multi-voltage verification with assertions, automated clock tree synthesis, and automated power switch optimization.

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