Posts Tagged ‘PCBs’

Can we expect exciting times in 2008?

January 1, 2008 Comments off

Welcome 2008! May I wish all my readers a very happy and prosperous 2008. Another year’s gone past. We have a habit of looking back to see at what happened and what could have been.

A lot has been written already about 2007 and what to expect in 2008. So let’s just touch upon some of the events from 2007 and some expectations from 2008.

For India, 2007 was a great year for the semiconductor industry — first, the Indian government announced the semiconductor policy, followed some months later by the fab policy. Both were tremendous firsts in India’s science and technology, and not IT, history. Everyone hopes that the Indian semiconductor industry will take off this year. Eyes are focused on the embedded segment, what with the global semiconductor industry reportedly facing ‘an embedded dilemma.’

An issue hitting the EDA industry is that, the cost of designing or developing the embededded software for an SoC actually passed the cost of desgining the SoC itself in 2007. The world needs to avoid this software crisis, and India is well placed to take full advantage and play a major role, given its strength in embedded.

In IT, it’s been a mixed sort of a year for Apple, which hit big time with the iPhone, seemed not to make waves with either the Safari browser or the Leopard OS. Microsoft had the Vista OS, but then, Vista didn’t exactly warm the hearts of users or those who wished to upgrade their OS, including yours truly. Maybe, 2008 would ring in better times for Vista.

While on browsers, Firefox has gained lot of ground. However, by the end of 2007 came the news that the Netscape Web browser — which started it all — would soon be confined to history.

Netscape Navigator was the world’s first commercial Web browser and launch pad of the Internet boom. It will be taken off on February 1, 2008, after a 13-year run. Time Warner’s AOL, its current owner, has reportedly decided to kill further development and technical support to focus on growing the company as an advertising business. The first version of Netscape had come out in late 1994.

In gaming, there are admirers of Wii, PS3 and Xbox 360, and will remain the same. Which one of these gaming consoles will reign supreme, eventually, is difficult to predict.

In consumer electronics, lines are surely blurring between portable media players (PMPs) and portable navigation devices. Also, it would be interesting to see how digital photo frames survive 2008. A reported tight supply, especially for seven-inch models, has led to some makers in Asia either postponing mass production or extending lead times. Surely, makers cannot add more entertainment functions in smaller screen models, to keep costs down.

In the security products market, IP cameras and video servers should have a better year, with more emphasis now on video surveillance. In fact, some friends have been querying me as well regarding their potential.

On components, we can hope to see more growth for solid polymer capacitors in 2008, and among PCBs some fabricators should start manufacturing high-density interconnect (HDI) PCBs this year.

In wireless, we should witness TD-SCDMA in operation prior to the Beijing Olympic Games. Backers would like to see TD-SCDMA succeed, given the effort Datang-Siemens has made on the technology, as also the Chinese government, which issued spectrum for TD-SCDMA nearly five years ago!

Let’s all welcome 2008 and look forward to more exciting things happening.

Next-gen PCB design with Allegro

May 28, 2007 Comments off

Cadence was kind enough to discuss its Allegro solution with me recently. The solution aims at enhancing the productivity for next-generation PCB designs.

According to Steve Kamin, Group Director, Cadence’s Allegro systems division, customers face constraints such as higher frequency, power consumption, pin counts, packages, etc. The PCB designers also face challenges such as decreasing hole sizes, hole diameter, etc.

Features of the Allegro include GUI (graphical user interface) modernization, context sensitive editing paradigm, color and visibility improvements, integration of physical and spacing constraints into the Constraint Manager, and an interactive planning and global routing, respectively.

In a PCB design flow, Cadence has focused on usability and productivity. The Allegro has a modernized GUI. All of the tool bars have been completely refreshed. Cadence has also added foldaway windows.

Cadence has added context-sensitive editing and included an open GL graphics engine that improves the visibility of objects and components on a board. This release can handle all sorts of intricate designs.

It has also addressed the physical and spacing constraints, which has been included that into the Constraint Manager. This is a cockpit, a spreadsheet-based tool, which manages all of the properties. Cadence is selling this solution to OEMs, ODMs, PCB design services companies, etc.

The Allegro solution has an interactive planning and global routing facility. Cadence has also added an entry-level product in the OrCAD PCB Designer Basics. Its GRE is a new, next-generation technology, which has two new elements — the interactive flow planner and the Global Route Environment.

The GRE cuts to 1-2 iteration of routing. Customers can control the direction of the routes. Fabricators sometimes have had to kill the design as they could not control the routing or it was not possible. Hence, Allegro takes care of this issue. It saves significant time, from 15 months to about three months.

Allegro facilitates an improved design creation and simulation as well. The Allegro System Architect has differential pairs support and improved schematic generation. Other features include physical and spacing constraints in Allegro Design Entry HDL, performance and convergence improvements in Cadence Pspice and Allegro AMS Simulator, etc. Cadence has improved the automatic schematic generator. Also, in the analog simulation product line, it has added the automated convergence capability.

Finally, the company has added Cadence Help across all of its products. This allows cross-linking across all Cadence’s tools. Customers can also add their own content. Cadence integrates third-party thermal integration tools into the products.

Categories: Cadence, EDA, PCB services, PCBs, Semicondutors Tags: ,

Take care of thermal distribution for higher-layer PCBs

March 31, 2007 Comments off

This is an extension to an earlier piece on the subject. During my various meetings in Hong Kong, I found Johnny Keung, deputy general manager, Circuitone, as a very good resource for discussing PCB services.

He described that immersion tin was economical, complied with RoHS, could replace immersion gold, and go fine line width. Circuitone offers 4µx4µ line width. As for spacing, it can go down to 3µ spacing.

The board size can be limited by equipment. Circuitone has equipment that handles 24x24inch board sizes. It can also offer 0.003” line width (3µx3µ) for high-density PCBs in large volumes. It offers minimum hole-width of 0.2mm, and plans to offer 0.1mm hole-width by Q4-07. This is indeed significant.

There had been some reports in the trade press regarding some Mainland Chinese PCB fabricators offeing 20- and even 40-layer PCBs.

Keung said there were two benchmarks. One, switching from double-sided to four layers, and two, switching from four layers to six layers.

He pointed out that Circuitone could use technology from six layers up to 20 layers. If it went beyond 20 layers, for example, 22 layers, there may be difficulties with thermal distribution within the board.

As I understand from our discussions, for up to 20 layers or so, heat distribution was on the top layer of the PCB, while distribution across middle layer could be uneven. Layers at the bottom could experience higher heat transfer than those in the middle.

Even PCB pressing is done in two stages: one, increase heat so the bonding sheet started to melt, and two, if temperature kept increasing, the glue was transformed into solid. This was the final curing stage.

Commenting on 40-layer PCBs, Keung commented that those boards at the outer layer would likely start melting, and those at the core layer would be in solidstate. When heat was being transferred into core layer, the evenness of distribution changed. The outer layer would remain in solidstate as well. So, expansion/contraction could get uneven, and registration could be a big challenge.

Fabricators should definitely look into this aspect, before designing higher-layer PCBs. I believe, some research work has been done by PCB makers to develop higher-layer PCBs. We discussed the yield rate earlier. That has to rise.

Adding layers on multilayer PCBs

March 31, 2007 Comments off

Multilayer PCBs (ML-PCBs) are used for a whole range of applications, such as broadband routers, RF applications, set-top boxes, backpanels, keyboards and power supplies.

However, what is significant today is the number of layers that a PCB comprises. Some other issues include line width, minimum thickness, minimum hole size, surface finish — immersion gold/silver/tin, lead-free, flash gold, HAL, OSP, etc.

The variety offered by PCB fabricators is indeed stagggering. Consider Introlines. It offers PCBs with line width of 0.08mm and minimum thickness 0.1mm, and minimum hole size 0.2mm.

PCBs come in surface finishes such as lead-free, flash gold, HAL, OSP, etc. Among immersion gold/silver/tin, gold is said to be more popular.

Another point to be noted is how many of the PCBs are RoHS compliant. We don’t yet discuss RoHS extensively in India, but those following the industry know exactly how important RoHS has become. About 70 percent of Introlines’ PCBs are RoHS compliant.

Main applications for TC Intn’l’s ML-PCBs include audio/video, automotive, home appliances, industrial applications and power supplies. The ability to offer low-mix, high-volume boards provides TC Int’l with a competitive advantage.

TC Int’l can offer ML-PCBs with line spacing of 4mil (0.1mm), line width of 0.1mm, finished hole size of 0.2mm and via diameter of 0.2mm. Plating is offered in Ni/Au, immersion gold and lead-free HAL. Immersion silver finish would soon be offered, in fact, from this year onward.

More layers on the PCB, design changes (higher layer count as against lower layer points), and low-mix/high-volume product lines are said to be the emerging trends.
TC Intn’l handles nickel/gold plating, immersion gold, Entek, V-cut, etc. It uses SMT and fine line 4/4mil line width spacing techniques. Surface finishing is taken care of by HAL, lead-free HAL, selective gold plating, OSP or preflux coating (Entek), etc.

TC Intn’l plans to add immersion silver after listing on the HKSE, which is by 2007. The supplier is also targeting CE, automobile and computer peripheral segments.

Tyson produces ML-PCBs up to 10 layers. It maintains line width of 3µ for ML-PCBs. For developing ML-PCBs above 10 layers, it will use special drilling machines with X-ray feature to target the right hole to drill. Tyson’s ML-PCBs are targeted at applications such as GPS, mobile phones, remote controls and Bluetooth chipsets.

United Talent offers SS/DS, rigid and ML-PCBs ranging from four to 16 layers. It provides surface finishes in HAL, Entek, lead-free HASL, and immersion gold/silver/tin.

Coming to the number of layers, TC Intn’l offers ML-PCBs up to 12 layers. It had done trial runs for 10- and 12-layers. Feedback from customers had been encouraging.

TC Intn’l uses FR-1/FR-4 as board materials. For SS-PCBs, it uses base laminates such as XPC, FR1/2, CEM-1/3, FR4, etc. For DS-PCBs, it uses CEM-3 and FR4. For ML-PCBs, it uses FR4. Over 95 percent of its products are lead free.

TC Intn’l has machines for pressing PCBs for higher layers. Mass lamination is used for up to 12 layers, and pin lamination for above 12 layers. Suppliers can also use pin-lamination machines for 24-layer boards.

TC Intn’l offers 4µx4µ line width and spacing. The need for higher-layer PCBs was tight, especially for military, ATC and communications. Yield rate was not very high, and there was more wastage/scrap rate. The 3µx3µ line width was a niche market.

This point has to be noted, especially by fabricators looking to develop higher layer ML-PCBs as the yield rate is of immense importance.

Categories: ML-PCBs, multilayer PCBs, PCBs Tags:
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