This is a continuation of my coverage of the fortunes of the global semiconductor industry. I would like to acknowledge and thank Mike Cowan, an independent semiconductor analyst and developer of the Cowan LRA model, who has provided me the latest numbers.
June 2011’s “actual” global semiconductor sales number is scheduled to be released by the WSTS, via its monthly HBR (Historical Billings Report), on or about Friday, August 5th. The monthly HBR is posted by the WSTS on its website.
In advance of the upcoming June sales release by the WSTS, Mike Cowan will detail an analysis capability using the Cowan LRA forecasting model to project worldwide semiconductor sales for 2011; namely, the ability to provide a “look ahead” scenario for year 2011’s sales forecast range as a function of next month’s (in this case June’s) “actual” global semiconductor sales estimate.
The output of this “look ahead” modeling capability is captured in the scenario analysis matrix displayed in the table below. The details of these forecast results are also summarized in the paragraphs immediately following the table.
In order to facilitate the determination of these “look ahead” forecast numbers, an extended range in possible June 2011’s “actual” sales is selected a-priori; in this particular scenario analysis, a June 2011 sales range from a low of $27.935 billion to a high of $30.935 billion, in increments of $0.250 billion, was chosen as listed in the first column of the table.
This estimated range in possible “actual” sales numbers is “centered around” a projected June sales forecast estimate of $29.435 billion as gleamed from last month’s Cowan LRA Model run (based upon May’s WSTS published “actual” sales number). The corresponding June 3MMA sales forecast estimate is projected to be $25.445 billion. (NOTE – assumes no, or minor. revisions in either April or May’s previously published “actual” sales numbers released last month by the WSTS).
The overall year 2011 sales forecast estimate for each one of the assumed June sales over the pre-selected range of ‘actual’ sales estimates is calculated by the model, and is shown in the second column of the table. Read more…
Cowan’s LRA model: Actual July 2010 global semicon sales $24.57bn; down 9.5 percent from last month (June)
The WSTS posted the July 2010 global semiconductor sales report (Historical Billings Report, HBR) on its website this Wednesday.
Therefore, with the WSTS having released its actual July 2010 global semiconductor sales number Cowan has provided the latest monthly update to the Cowan LRA Model’s derived forecast results. The updated forecast numbers for 3Q, 4Q and 2010 “kicked up” slightly from the previous month’s forecast estimates.
The actual July 2010 global semiconductor sales announced by the WSTS came in at $24.568 billion which is:
July 2010’s actual semiconductor sales (of $24.568 billion) came in higher (by $1.180 billion) than the model’s last month’s July 2010 sales forecast estimate (of $23.388 billion) representing a plus 5.0 percent delta comparing July 2010’s actual sales number (published by the WSTS) to the projected forecast estimate “put forth” by the Cowan LRA forecasting model and reported last month. This percent delta represents the Cowan LRA Model’s MI.
The MI is defined as the percent difference between the actual sales for a given month — in this case July 2010’s just published actual global sales of $24.568 billion and the forecasted sales estimate for July 2010, that is, $23.388 billion, which was calculated and published last month.
The MI can be either positive or negative and is a measure of the percent deviation of the actual monthly sales number from the previous month’s prediction derived by the model’s linear regression analysis of the past 26 years of historical, monthly global “sales experience.”
Mike Cowan has shared with us an additional feature of the Cowan LRA Model for forecasting worldwide semi sales; namely, the capability to provide a “look ahead” scenario analysis for 2010’s global semi sales forecast update as a function of next month’s (in this case June’s) actual sales normally published by the WSTS (expected on Thursday, August 5, 2010).
The specifics of the scenario analysis are discussed in the following paragraphs and detailed in the tables.
This chosen range of actual sales is “centered around” the actual June sales forecast estimate of $28.291 billion as determined by last month’s May run of the model. The corresponding June 3MMA sales forecast estimate is $25.230 billion.
The overall year 2010 sales forecast estimate for each assumed, estimated sales number of the selected range of June actual sales is calculated by the model, and is shown in the second column of the table.
The third column reveals the resulting yr-o-yr sales growth estimates compared to year 2009 actual sales (of $226.3 billion).
Finally, the fourth and fifth columns show the corresponding 3MMA, three Month Moving Average, sales estimate and the associated yr-o-yr sales growth relative to June 2009’s 3MMA sales (of $17.483 billion), respectively.
April set the ball rolling for a blockbuster second quarter making what will now be five successive quarters of growth. Our 3 percent Q2 growth forecast looks increasingly timid, with 6-8 percent more likely. Virtually all forecasters are now pitching 2010’s growth at the 30 percent level, so there is little left to argue about other than guessing the exact final number.
Whether the ‘final’ number is 28 or 38 percent really makes no odds; it is the underlying trend that counts, something we forecast correctly over 18 months ago.
The real issue now is “What about 2011?” We are clearly now in a boom and the next phase is bust, but when, how deep and how fast will it collapse? We are currently reappraising this and our 2011 forecast, with the analyses to be presented at our forthcoming IFS2011 Mid-Term International Forecast Seminar in London on 20th July.
Forget all of the intellectual arguments about expanded geographical customer base, broader application range and the smoothing effects these would have, all that is hogwash. The industry boom-bust cycles persist and will continue to do so all the while demand dynamics are measured in weeks and the supply-side in quarters making it impossible to ever balance supply and demand.
At this point it is pertinent to revive a slide I first presented at the IEEE meeting in Boston in 1975. This slide is as valid today as it was 35 years ago.
After four quarters of growth, the industry now finds itself in the full flood of a classic market boom. Order books are full, customers are building stocks, double ordering is rife, capacity is strained, lead times increasing and deliveries are stretched.
Inventory replenishment started in Q2-2009, due to the severe inventory overdepletion in Q4-2008/Q1-2009, and was over by Q4-2009 to be replaced by inventory building in 1H-2010, driven by lead-time extension. Typically every week of extra lead-time adds at least half a week to WIP.
Double, even triple, ordering (due to supply shortages) only really started in 1H-2010 and is definitely getting worse, but double ordering is NOT double shipping, yet. For that to happen, supply needs to catch up with demand. That leaves just one item missing from the 1975 list … ‘prices stabilise’, the worldwide semiconductor and IC ASP trends. Read more…
Some time ago, Cadence Design Systems Inc. had announced the EDA360 vision! As per Jaswinder Ahuja, corporate VP and MD of Cadence Design Systems India, the Cadence vision of EDA360 is said to be well and alive. The organization has been aligned around the EDA360 vision.
The EDA360 is a five-year vision for defining the trends in the EDA industry, based on what Cadence is observing in the industry and the direction in which, it feels, the industry will go.
At Cadence, the Silicon Realization Group is headed by Dr. Chi-ping Hsu. The SoC Realization Group is headed by Martin Lund, and Nimish Modi is looking after the System Realization Group. Cadence’s focus has been on in-house development and innovation. Tempus has been a major announcement from the Silicon Realization Group.
What’s going on with EDA360?
There has been a renewed thrust in the SoC Realization Group at Cadence. Already, there have been three acquisitions this year — Cosmic Circuits, Tensilica and Evatronix. Cadence is buying the IP part of the business from Evatronix. This acquisition is ongoing and will be announced in June 2013.
On the relationship between the electronics and the EDA industries, Ahuja said the electronics industry is going through a transition, and that the EDA industry needs to change. The importance of system-level design has increased. Companies are currently focusing on optimizing the end user experience.
Agnisys Inc. was established in 2007 in Massachusetts, USA, with a mission to deliver innovative automation to the semiconductor industry. The company offers affordable VLSI design and verification tools for SoCs, FPGAs and IPs that makes the design verification process extremely efficient.
Agnisys’ IDesignSpec is an award winning engineering tool that allows an IP, chip or system designer to create the register map specification once and automatically generate all possible views from it. Various outputs are possible, such as UVM, OVM, RALF, SystemRDL, IP-XACT etc. User defined outputs can be created using Tcl or XSLT scripts. IDesignSpec’s patented technology improves engineer’s productivity and design quality.
The IDesignSpec automates the creation of registers and sequences guaranteeing higher quality and consistent results across hardware and software teams. As your ASIC or FPGA design specification changes, IDesignSpec automatically adjusts your design and verification code, keeping the critical integration milestones of your design engineering projects synchronized.
Register verification and sequences consume up to 40 percent of project time or more when errors are the source of re-spins of SoC silicon or an increase in the number of FPGA builds. IDesignSpec family of products is available in various flavors such as IDSWord, IDSExcel, IDSOO and IDSBatch.
IDesignSpec more than a tool for creating register models!
Anupam Bakshi, founder, CEO and chairman, Agnisys, said: “IDesignSpec is more than a tool for creating register models. It is now a complete Executable Design Specification tool. The underlying theme is always to capture the specification in an executable form and generate as much code in the output as possible.”
The latest additions in the IDesignSpec are Constraints, Coverage, Interrupts, Sequences, Assertions, Multiple Bus Domains, Special Registers and Parameterization of outputs.
“IDesignSpec offers a simple and intuitive way to specify constraints. These constraints, specified by the user, are used to capture the design intent. This design intent is transformed into code for design, verification and software. Functional Coverage models can be automatically generated from the spec so that once again the intent is captured and converted into appropriate coverage models,” added Bakshi.
Using an add-on function of capturing Sequences, the user is now able to capture various programming sequences in the spec, which are translated into C++ and UVM sequences, respectively. Further, the interrupt registers can now be identified by the user and appropriate RTL can be generated from the spec. Both edge sensitive and level interrupts can be handled and interrupts from various blocks can be stacked.
Assertions can be automatically generated from the high level constraint specification. These assertions can be created with the RTL or in the external files such that they can be optionally bound to the RTL. Unit level assertions are good for SoC level verification and debug, and help the user in identifying issues deep down in the simulation hierarchy.
The user can now identify one or more bus domains associated with Registers and Blocks, and generate appropriate code from it. Special Registers such as shadow registers and register aliasing is also automatically generated.
Finally all of the outputs such as RTL, UVM, etc., can be parameterized now, so that a single master specification can be used to create outputs that can be parameterized at the elaboration time.
How is IDesignSpec working as chip-level assertion-based verification?
Bakshi said: “It really isn’t an assertion tool! The only assertion that we automatically generate is from the constraints that the user specifies. The user does not need to specify the assertions. We transform the constraints into assertions.”
Stoke Inc. is an established player in LTE security, commercial Wi-Fi and LTE enablement, and is already engaged research into small cell signaling issues. It will be displaying a range of solutions for the global telecom industry at the forthcoming Mobile World Congress 2013 in Barcelona, Spain.
Outlook for telecom in 2013
First, I asked Stoke about the outlook for the telecom industry in 2013. According to Dave Williams, CTO, Stoke, 2013 will be the year of LTE globally. Deployments will accelerate worldwide. It is significant that Europe, in particular, has woken up to LTE.
Next, large-scale infrastructure suppliers are experiencing shifts in demand. While operators in the Americas and Japan are high spenders, in Europe there are major vendors whose technology posture is while newer players have become rising stars
Further, Wi-Fi as an ongoing force in the industry – with subscribers accustomed to ‘leaving’ their cellular providers for Wi-Fi options, operator services such as international roaming and rate plans are losing their money-spinning potential. 3G data plan revenues are shrinking because of the superior appeal of Wi-Fi to subscribers. Operators must accommodate this reality in their LTE planning.
Williams added that a trend will be the polarization of the device landscape. The Android’s dream of many device manufacturers with one software interface has faded. We’re seeing a polarized landscape of Samsung/Google versus Apple. RIM is struggling and facing further potential challenges as many of its enterprise contracts approach end of life in 2013. Microsoft may emerge as a player in in the tablet area. Look for some M&A activity from unexpected areas. Also, small cells are seen as the answer to spectrum challenges, but the rollouts will be slow for the next two years as the technology matures.
Finally, driven primarily by the popularity of Apple and Samsung personal devices, BYOD – Bring Your Own Device – to work is a ground-up movement that has taken ID departments and security practitioners by surprise. This is likely to push regulatory measures – especially in the area of security – in the relatively near term. Access providers are under even more threat from the security perspective. It is not all bad, though. For savvy operators, there is the prospect of providing trusted, high quality and easy connections to a large proportion of the estimated 7 billion BYOD users worldwide.
It would be interesting to hear about what are Stoke’s plans for the MWC 2013. Williams said, “At MWC, look for Stoke to announce its new generation LTE mobile border access gateway, new LTE signaling capabilities in its Security eXchange and, on the Wi-Fi eXchange side, a new event access offering in conjunction with an ecosystem of partners.”
Stoke’s Wi-Fi exchange gateway solution
Elaborating on Stoke’s Wi-Fi exchange gateway solution, he said the Wi-Fi eXchange is a gateway application that automatically authenticates Wi-Fi attached subscribers and securely links them to their 3G or LTE cellular network services and/or to the Internet.
Wi-Fi eXchange enables the operators to maximize the benefits of service provider Wi-Fi while limiting traffic loads on the mobile core through dynamic, selective traffic steering. Wi-Fi eXchange is an important catalyst for operators seeking to transition from Wi-Fi as merely RAN congestion relief to Wi-Fi as a new service delivery medium.
On Jan. 23, Stoke announced the newly-available Wi-Fi eXchange gateway that is engaged in multiple commercial service trials uncovering new ways for telecommunications operators to incorporate Wi-Fi as a revenue-supporting service. In a single unit, Wi-Fi eXchange introduces a broad set of extremely flexible Wi-Fi management capabilities previously unavailable to mobile broadband carriers.
Wi-Fi Alliance has been instrumental in driving the evolution of Wi-Fi strategies, providing a forum for Wi-Fi operators, equipment providers and hardware manufacturers to develop industry-wide standards and programs which are critical to mass market adoption. The Passpoint certification program, launched in June 2012, has seen significant industry adoption so far.
How will 2013 turn out to be for the global semiconductor industry? Will there be growth for the global EDA industry? Importantly, how will the Indian semiconductor industry perform in 2013? I asked Jaswinder Ahuja, corporate VP and MD, Cadence Design Systems India these questions.
Outlook for global semicon industry in 2013
First, how is the outlook for global semiconductor industry in 2013 going to be? Ahuja said: “The long term outlook for the semiconductor industry remains positive, with mobility and cloud computing being the key drivers. The global economy is forecast to grow around 4 percent annually through 2016, according to an April 2012 report from the International Monetary Fund (IMF).
“In its June 2012 report, Gartner predicted growth in electronics and semiconductor industries to outpace that of the world GDP growth, at 5½ percent annually to approach $2 trillion for electronics and 6 percent annually for semiconductors through 2016. So, the semiconductor industry outlook remains very positive overall.
“In the near term, multiple challenges will need to be weathered with respect to the global economic climate, especially in European markets. The JP Morgan/GSA Semiconductor Index of Leading Indicators points to a soft semiconductor industry in 2013. However, there are lot of new products in the mobile and tablet space that are driving demand, such as the iPhone 5, Microsoft Surface, and Samsung Galaxy S III.
“The China semiconductor space is emerging as a key market for semiconductor company revenue, and forecasts predict that it will show rapid annual growth rate. The consolidation and M&A activities that we are seeing in the global semiconductor industry also indicate a positive outlook for the upcoming year.
“In India as well, the semiconductor industry will continue to see growth. The injection of funds and other support outlined in the National Policy on Electronics will provide an impetus to home-grown design and manufacturing, which should start gaining traction in 2013.”
Five trends for 2013
What would be the three or five trends likely to be visible in 2013? Ahuja said Cadence sees five big trends that will drive growth in the near and long term. These are: mobility, application driven design, video, cloud and security.
Probably, the most pervasive change in electronics recently has been mobility. When we talk about mobility, it’s just not about smart phones or tablets, but any kind of device which is mobile. Within the mobile space, software applications help system manufacturers and vendors differentiate themselves and stand apart from the competition. The need to have apps on all kinds of devices is driving rapid growth, as well as placing new demands on EDA companies.
The entertainment industry will be the key driver for video, and as the year progresses, we will continue to see more and more products and solutions introduced to tap into the demand. For the semiconductor industry, video will drive growth both in the end consumer market (mobile platforms) and the enterprise space (networking industry).
In many ways, the backbone to mobility is the cloud. With its network servers and infrastructure, the cloud is what delivers much of the content and value to all of those mobile devices. Statistics show that we need one server for every 600 smart phones and one for every 120 tablets. So there is a big need for data centers which can provide support for all the computing and back-end operations.
Security of data in mobile devices and the cloud will continue to be a challenge in the near future. There will be renewed calls to develop products that can protect critical infrastructure and sensitive information from security breaches.
Roger de Keersmaecker, IMEC, Belgium, presented on IMEC’s 450mm R&D initiative in support of the nanoelectronics ecosystem at the Semicon Europa event in Dresden, Germany. IMEC has prepared an integrated 450mm R&D initiative. This will present an innovation engine supporting the global nanoelectronics ecosystem.
IMEC will play a key role in the acceleration of 450mm equipment development by timely installation of alpha/beta-demo tools for early learning, in an industry-relevant technology flow and ensuring patterning capability by early 2016. The 450mm R&D pilot line will enable full 450mm process capability for advanced nodes by early 2017.
Logic device scaling slows down and ‘interim’ nodes are likely to be introduced. Disruptive devices are needed beyond 10nm. NAND flash is migrating from 2D floating gate to 3D SONOS device architecture.
Emerging memories are being introduced at 1x nm node. The parallel system scaling path done using 3D TSV technology is established and slowly gaining in momentum. Die cost is also exploding. There is an increasing need for an innovation pipeline, early design/technology co-optimization and cost reduction.
IMEC announced the opening of 300mm CR expansion on June 8, 2010. The cleanroom expansion is 450mm ready. There is 1,200m2 extra clean room space, and ready for EUV. Fab 1 is a 200mm pilot line and 5200 m2 CR (1750 m2 Class 1), with 24/7 continuous operation. Fab 2 is a 300mm pilot line with ball room, clean sub-fab, and 3200 m2 + 1200 m2 CR, also in 24/7 continuous operation.
IMEC started engineering new 450mm clean room in 2012. It has plans to stat constructing the clean room in 2013 and complete by 2015. The Flemish Minister of Innovation, Ingrid Lieten, announced to invest in the building of imec’s 450mm clean room facilities.
With the combination of a state-of-the-art 300mm clean room and the transition to 450mm, imec will be able to keep on delivering its partners topnotch research on (sub)-10nm devices enabling the future growth of the global nanoelectronics industry.